IR2112
(
-1-2
)(
S
)
PbF
12 www.irf.com
Figure 20B. Logic “1” Input Current vs. V
DD
Voltage
0
20
40
60
80
100
02468101214161820
VDD Logic S upply V oltage (V )
Lo
ic " 1" In
ut Bias Current
uA
Max.
Typ.
0
1
2
3
4
5
-50 -25 0 25 50 75 100 125
Logic "0" Input Bias Current (uA)
Tem
erature
°C
Figure 21A. Logic “0” Input Current vs. Tempera-
ture
Max.
Figure 22. VBS Undervoltage (+) vs. Temperature
Max.
Typ.
Min.
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
VBS Undervoltage Lockout -(V
Temperature (°C)
Figure 23. VBS Undervoltage (-) vs. Temperature
Max.
Typ.
Min.
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
Vcc Undervoltage Lockout +(V)
Temperature
Max.
Typ.
Min.
Figure 24. VCC Undervoltage (-) vs. Temperature
Figure 21B. Logic “0” Input Current vs. V
DD
Voltage
0
1
2
3
4
5
0 2 4 6 8 10121416182
Logic "0" Input Bias Current (uA)
VDD Supply Voltage (V)
Max.
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
VBS Undervoltage Lockout +(V)
Temperature (°C)