Data Sheet OP270
Rev. F | Page 15 of 20
CAPACITIVE LOAD DRIVING AND POWER SUPPLY
CONSIDERATIONS
The OP270 is unity-gain stable and capable of driving large
capacitive loads without oscillating. Nonetheless, good supply
bypassing is highly recommended. Proper supply bypassing
reduces problems caused by supply line noise and improves the
capacitive load driving capability of the OP270.
In the standard feedback amplifier, the output resistance of the
op amp combines with the load capacitance to form a low-pass
filter that adds phase shift in the feedback network and reduces
stability. A simple circuit to eliminate this effect is shown in
Figure 39. The components C1 and R3 decouple the amplifier
from the load capacitance and provide additional stability. The
values of C1 and R3 shown in Figure 39 are for a load capacitance
of up to 1000 pF when used with the OP270.
00325-040
C1
200pF
V
IN
V
OUT
PLACE SUPPLY DECOUPLING
CAPACITOR AT OP270
OP270
V
+
R1
C3
0.1µF
C2
10µF
C1
1000pF
R2
C4
10µF
C5
0.1µF
R3
50
+
V–
+
Figure 39. Driving Large Capacitive Loads
UNITY-GAIN BUFFER APPLICATIONS
When R
f
≤ 100 Ω and the input is driven with a fast, large signal
pulse (>1 V), the output waveform looks like the one in Figure 40.
During the fast feedthrough-like portion of the output, the input
protection diodes effectively short the output to the input, and
a current, limited only by the output short-circuit protection, is
drawn by the signal generator. With R
f
≥ 500 Ω, the output is
capable of handling the current requirements (I
L
≤ 20 mA at 10 V);
the amplifier stays in its active mode and a smooth transition occurs.
When R
f
> 3 kΩ, a pole created by R
f
and the input capacitance
(3 pF) of the amplifier creates additional phase shift and reduces
phase margin. A small capacitor (20 pF to 50 pF) in parallel with
R
f
helps eliminate this problem.
00325-041
OP270
2.4Vs
R
f
Figure 40. Pulsed Operation
OP270 Data Sheet
Rev. F | Page 16 of 20
LOW PHASE ERROR AMPLIFIER
The simple amplifier depicted in Figure 41 utilizes a monolithic
dual operational amplifier and a few resistors to substantially
reduce phase error compared with conventional amplifier
designs. At a given gain, the frequency range for a specified
phase accuracy is more than a decade greater than that of a
standard single op amp amplifier.
The low phase error amplifier performs second-order fre-
quency compensation through the response of Op Amp A2 in
the feedback loop of A1. Both op amps must be extremely well
matched in frequency response. At low frequencies, the A1
feedback loop forces V
2
/(K1 + 1) = V
IN
. The A2 feedback loop
forces V
O
/(K1 + 1) = V
2
/(K1 + 1), yielding an overall transfer
function of V
O
/V
IN
= K1 + 1. The dc gain is determined by the
resistor divider at the output, V
O
, and is not directly affected by
the resistor divider around A2. Note that, like a conventional
single op amp amplifier, the dc gain is set by resistor ratios only.
Minimum gain for the low phase error amplifier is 10.
00325-042
1/2
OP270E
A2
1/2
OP270E
A1
R1
V
O
V
2
V
IN
R1
K1
R2 R2 = R1
ω
T
s
R2
K2
V
O
= (K
1
+ 1)V
IN
ASSUME A1 AND A2 ARE MATCHED.
A
O
(s) =
Figure 41. Low Phase Error Amplifier
Figure 42 compares the phase error performance of the low
phase error amplifier with a conventional single op amp
amplifier and a cascaded two-stage amplifier. The low phase
error amplifier shows a much lower phase error, particularly for
frequencies where ω/βω
T
< 0.1. For example, a phase error of
−0.1° occurs at 0.002 ω/βω
T
for the single op amp amplifier, but
at 0.11 ω/βω
T
for the low phase error amplifier.
00352-043
–7
–6
–5
–4
–3
–2
–1
0
PHASE SHIFT (Degrees)
FREQUENCY RATIO (1/βω)(ω/ω
T
)
0.001
0.005
0.01 0.1 1
LOW PHASE ERROR
AMPLIFIER
CASCADED
(TWO STAGES)
SINGLE OP AMP.
CONVENTIONAL DESIGN
0.05 0.5
Figure 42. Phase Error Comparison
FIVE-BAND, LOW NOISE, STEREO GRAPHIC
EQUALIZER
The graphic equalizer circuit shown in Figure 43 provides 15 dB
of boost or cut over a five-band range. Signal-to-noise ratio over
a 20 kHz bandwidth is better than 100 dB and referred to a 3 V
rms input. Larger inductors can be replaced by active inductors,
but consequently reduces the signal-to-noise ratio.
00325-044
1/2
OP270E
1/2
OP270E
R2
3.3k
R1
47k
R4
1k
60Hz
TANTALUM
V
OUT
V
IN
R14
100
R13
3.3k
C2
6.8µF
L1
1H
C1
0.47µF
R3
680
200Hz
R6
1k
800Hz
R8
1k
3kHz
R10
1k
10kHz
R12
1k
+
TANTALUM
C3
1µF
L2
600mH
R5
680
+
C4
0.22µF
L3
180mH
R7
680
+
C5
0.047µF
L4
60mH
R9
680
+
C6
0.022µF
L5
10mH
R11
680
+
Figure 43. Five-Band, Low Noise Graphic Equalizer
Data Sheet OP270
Rev. F | Page 17 of 20
DIGITAL PANNING CONTROL
Figure 44 uses a DAC8221 (a dual 12-bit CMOS DAC) to pan a
signal between two channels. One channel is formed by the
current output of DAC A driving one-half of an OP270 in a
current-to-voltage converter configuration. The other channel
is formed by the complementary output current of DAC A,
which normally flows to ground through the AGND pin. This
complementary current is converted to a voltage by the other
half of the OP270, which also holds AGND at virtual ground.
Gain error due to mismatching between the internal DAC
ladder resistors and the current-to-voltage feedback resistors is
eliminated by using feedback resistors internal to the DAC8221.
Only DAC A passes a signal; DAC B provides the second
feedback resistor. With V
REF
B unconnected, the current-to-
voltage converter, using R
FBB
, is accurate and not influenced by
digital data reaching DAC B. Distortion of the digital panning
control is less than 0.002% over the 20 Hz to 20 kHz audio
range. Figure 45 shows the complementary outputs for a 1 kHz
input signal and a digital ramp applied to the DAC data input.
DUAL PROGRAMMABLE GAIN AMPLIFIER
The dual OP270 and the DAC8221 (a dual 12-bit CMOS DAC)
can be combined to form a space-saving, dual programmable
amplifier. The digital code present at the DAC, which is easily
set by a microprocessor, determines the ratio between the internal
feedback resistor and the resistance that the DAC ladder presents
to the op amp feedback loop. Gain of each amplifier is
nV
V
IN
O
4096
w
here n is the decimal equivalent of the 12-bit digital code
present at the DAC.
If the digital code present at the DAC consists of all 0s, the
feedback loop opens, causing the op amp output to saturate. A
20 MΩ resistor placed in parallel with the DAC feedback loop
eliminates this problem with only a very small reduction in gain
accuracy.
0325-045
1/2
OP270GP
V
IN
NC
R
FBA
1
1
23
2422
18
19
CS
WR
WRITE
CONTROL
20
6
5
7
3
24
3
21
V
DD
DAC8221P
2
8
4
0.01µF
+15V
–15V
OUT
I
OUT
A
I
OUT
B
AGND
DGND
5
1/2
OP270GP
DAC B
DAC A
+5V
10µF
+
10µF
+
0.1µF
R
FBB
V
REF
A
V
REF
B
DAC A/DAC B
DAC DATA BUS
PINS 6 (MSB) TO 17 (LSB)
OUT
Figure 44. Digital Panning Control
00352-046
5V5V 1ms
A
OUT
A
OUT
Figure 45. Digital Panning Control Output

OP270GP

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers VERY LOW-NOISE PRECISION
Lifecycle:
New from this manufacturer.
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