Dual-Channel, 14-Bit CCD Signal Processor
with V-Driver and
Generator
Data Sheet
Rev. SpH Document Feedback
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FEATURES
60 MHz grade available (AD9928BBCZ-60)
Registers similar to AD9920A and AD9990
Timing generator with 18-channel V-driver
Serial data output with reduced range LVDS interface
1.8 V dual AFE core
Internal LDO regulators for compatibility with 3 V systems
Correlated double sampler (CDS) with −3 dB, 0 dB, +3 dB,
and +6 dB gain
6 dB to 42 dB, 10-bit variable gain amplifier (VGA)
14-bit, 40 MHz analog-to-digital converter (ADC)
Black level clamp with variable level control
Precision Timing core with ~390 ps resolution at 40 MHz
On-chip 3 V horizontal and RG drivers
General-purpose outputs (GPOs) for shutter support
On-chip driver for external crystal
128-ball CSP_BGA package, 9 mm × 9 mm, 0.65 mm pitch
APPLICATIONS
High speed digital imaging
Surveillance cameras
Industrial cameras
GENERAL DESCRIPTION
The AD9928 is a highly integrated CCD signal processor for
digital still-image camera applications. It includes a dual analog
front end with analog-to-digital conversion, combined with a full-
function, programmable timing generator and an 18-channel
vertical driver (V-driver) for a 2-channel output CCD. The timing
generator is capable of supporting up to 24 vertical clock signals
internally, and the on-chip V-driver supports up to 18 high voltage
outputs. A Precision Timing® core allows adjustment of high speed
clocks with approximately 390 ps resolution at 40 MHz operation.
The AD9928 also contains seven general-purpose outputs, which
can be used for shutter and system functions.
Each analog front end includes black level clamping, CDS,
VGA, and a 14-bit ADC. The timing generator provides all the
necessary CCD clocks: RG, H-clocks, V-clocks, sensor gate
pulses, substrate clock, and substrate bias control.
The AD9928 is specified over an operating temperature range
of −25°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
For more information on the AD9928, email Analog Devices, Inc., at afe.ccd@analog.com.
AD9928
CDS
VGA
CLAMP
CLAMP
14-BIT
ADC
SL
SCK
SDATA
CLI
VREF_B
6dB TO 42dB
6dB TO 42dB
HORIZONTAL
DRIVERS
VERTICAL
TIMING
CONTROL
RG_A, RG_B
H1A TO H4A, H1B TO H4B
24
REFT_B REFB_B
PRECISION
TIMING
GENERATOR
SYNC
GENERATOR
INTERNAL CLOCKS
HD VD SYNC
INTERNAL
REGISTERS
CCDIN_A
–3dB, 0dB, +3dB, +6dB
HL_A, HL_B
CLO
GPO1 TO GPO7
XV1 TO XV24
XSUBCK
VERTICAL
DRIVER
SUBCK
CDS
VGA
14-BIT
ADC
CCDIN_B
–3dB, 0dB, +3dB, +6dB
TCLKP
TCLKN
DOUT0P_A
DOUT0N_A
DOUT1P_A
DOUT1N_A
DOUT0P_B
DOUT0N_B
DOUT1P_B
DOUT1N_B
V1A TO V15
XSUBCNT (GPO8)
LDO
REG_A
LDO
REG_B
VREF_A
REFT_A REFB_A
14
14
8
18
2
7
REDUCED
RANGE
LVDS
OUTPUTS
08261-001
RST
+1.8V
+3V
+1.8V
+3V
LDOIN_A
LDOOUT_A
LDOIN_B
LDOOUT_B
