SAM G51G / SAM G51N [SUMMARY DATASHEET]
Atmel-11209DS-ATARM-SAM-G51G-SAMG-51N-Summary-Datasheet_19-Nov-14
2
Features
Core
̶ ARM Cortex-M4 up to 48 MHz
̶ Memory Protection Unit (MPU)
̶ DSP Instructions
̶ Floating Point Unit (FPU)
̶ Thumb
®
-2 instruction set
Memories
̶ 256 Kbytes embedded Flash
̶ 64 Kbytes embedded SRAM
System
̶ Embedded voltage regulator for single-supply operation
̶ Power-on reset (POR) and Watchdog for safe operation
̶ Quartz or ceramic resonator oscillators: 3 to 20 MHz power with failure detection and 32.768 kHz for
RTT or device clock
̶ High-precision 8/16/24 MHz factory-trimmed internal RC oscillator. In-application trimming access for
frequency adjustment
̶ Slow clock internal RC oscillator as permanent low-power mode device clock
̶ PLL range from 24 MHz to 48 MHz for device clock
̶ Up to 18 Peripheral DMA Controller (PDC) channels
̶ Eight 32-bit General-Purpose Backup Registers (GPBR)
̶ 16 external interrupt lines
Power consumption in active mode
̶ 103 µA/MHz running Fibonacci on SRAM
Low-power modes (typical value)
̶ Wait mode 6.8 µA
̶ Wake-up time from wait mode to active mode: 3.2 µs
Peripherals
̶ One USART with SPI Mode
̶ Two 2-wire UARTs
̶ Three Two-Wire Interface (TWI) modules featuring two fast mode TWI masters and one high-speed
TWI slave
̶ One fast SPI at up to 24 Mbit/s
̶ One three-channel 16-bit Timer/Counter (TC) with capture, waveform, compare and PWM modes
̶ One 32-bit Real-time Timer (RTT)
̶ One Real-time Clock (RTC)
I/Os
̶ Up to 38 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch
filtering and on-die Series Resistor Termination. Individually Programmable Open-drain, Pull-up and
pull-down resistor and Synchronous Output
̶ Two up to 25-bit PIO Controllers
Analog
̶ One 8-channel 12-bit ADC, up to 600 ksps
