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MC14021BDR2G
P1-P3
P4-P6
P7-P7
MC14014B, MC14021B
http://onsemi.com
4
SWITCHING CHARACTERISTICS
(Note 5)
(C
L
= 50 pF, T
A
= 25
_
C)
Characteristic
Symbol
V
DD
Vdc
Min
Ty
p
(Note 6)
Max
Unit
Output Rise and Fall T
ime
t
TLH
, t
THL
= (1.5 ns/pF) C
L
+ 25 ns
t
TLH
, t
THL
= (0.75 ns/pF) C
L
+ 12.5 ns
t
TLH
, t
THL
= (0.55 ns/pF) C
L
+ 9.5 ns
t
TLH
,
t
THL
5.0
10
15
−
−
−
100
50
40
200
100
80
ns
Propagation Delay T
ime (Clock to Q, P/S to Q)
t
PHL
, t
PLH
= (1.7 ns/pF) C
L
+ 315 ns
t
PHL
, t
PLH
= (0.66 ns/pF) C
L
+ 137 ns
t
PHL
, t
PLH
= (0.5 ns/pF) C
L
+ 90 ns
t
PLH
,
t
PHL
5.0
10
15
−
−
−
400
170
11
5
800
340
230
ns
Clock Pulse Width
t
WH
5.0
10
15
400
175
135
150
75
40
−
−
−
ns
Clock Frequency
f
cl
5.0
10
15
−
−
−
3.0
6.0
8.0
1.5
3.0
4.0
MHz
Parallel/Serial Control Pulse Width
t
WH
5.0
10
15
400
175
135
150
75
40
−
−
−
ns
Setup T
ime
P/S to Clock
t
su
5.0
10
15
200
100
80
100
50
40
−
−
−
ns
Hold T
ime
Clock to P/S
t
h
5.0
10
15
20
20
25
– 2.5
– 10
0
−
−
−
ns
Setup T
ime
Data (Parallel or Serial) to
Clock or P/S
t
su
5.0
10
15
350
80
60
150
50
30
−
−
−
ns
Hold T
ime
Clock to D
s
t
h
5.0
10
15
45
35
35
0
0
5
−
−
−
ns
Hold T
ime
Clock to P
n
t
h
5.0
10
15
50
45
45
25
20
20
−
−
−
ns
Input Clock Rise T
ime
t
r(cl)
5.0
10
15
−
−
−
−
−
−
15
5
4
m
s
5.
The formulas given are for the typical characteristics only at 25
_
C.
6.
Data labelled “T
yp” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
MC14014B, MC14021B
http://onsemi.com
5
Figure 1. Output Source Current T
est Circuit
Figure 2. Output Sink Current T
est Circuit
PULSE
GENERA
TOR
PULSE
GENERA
TOR
V
DD
V
out
I
OH
EXTERNAL
POWER
SUPPL
Y
EXTERNAL
POWER
SUPPL
Y
P/S
C
P6
P7
P8
D
S
Q8
Q7
Q6
Preset output under test to a logic “1” level.
V
DD
V
out
P/S
C
P6
P7
P8
D
S
Q8
Q7
Q6
I
OL
Figure 3. Power Dissipation T
est Circuit and Waveform
PULSE
GENERA
TOR 1
V
DD
P/S
C
P6
P7
P8
D
S
Q8
Q7
Q6
PULSE
GENERA
TOR 2
500
m
F
I
D
0.01
m
F
CERAMIC
C
L
C
L
C
L
V
SS
P5
P4
P3
P2
P1
CLOCK
DA
T
A
50%
1
f
MC14014B, MC14021B
http://onsemi.com
6
Figure 4. Switching Time T
est Circuit and W
aveforms
PULSE
GENERA
TOR 1
PULSE
GENERA
TOR 2
V
DD
1
2
2
2
11
V
DD
V
SS
SW 1
SW 2
C
L
Q8
Q7
Q6
P/S
C
P6
P7
P8
D
S
P5
P4
P3
P2
P1
V
DD
V
SS
V
DD
V
SS
V
OH
V
OL
20 ns
20 ns
P
ARALLEL OR
SERIAL DA
T
A
INPUT
CLOCK OR P/S
INPUT
Q
OUTPUT
90%
50%
10%
t
su
t
WH
t
THL
90%
50%
10%
t
WH
t
WL
t
PLH
t
PHL
90%
50%
10%
t
TLH
t
THL
t
WL
= t
WH
= 50% DUTY CYCLE
SWITCH POSITION 1 = P
ARALLEL IN
SWITCH POSITION 2 = SERIAL IN
ORDERING INFORMA
TION
Device
Package
Shipping
†
MC14014BDG
SOIC−16
(Pb−Free)
48 Units / Rail
MC14014BDR2G
SOIC−16
(Pb−Free)
2500 Units / T
ape & Reel
NL
V14014BDR2G*
SOIC−16
(Pb−Free)
2500 Units / T
ape & Reel
MC14021BDG
SOIC−16
(Pb−Free)
48 Units / Rail
MC14021BDR2G
SOIC−16
(Pb−Free)
2500 Units / T
ape & Reel
NL
V14021BDR2G*
SOIC−16
(Pb−Free)
2500 Units / T
ape & Reel
†
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T
ape and Reel
Packaging
Specifications Brochure, BRD801
1/D.
*NL
V
Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PP
A
P
Capable.
P1-P3
P4-P6
P7-P7
MC14021BDR2G
Mfr. #:
Buy MC14021BDR2G
Manufacturer:
ON Semiconductor
Description:
Counter Shift Registers 3-18V 8-Bit CMOS Static Shift
Lifecycle:
New from this manufacturer.
Delivery:
DHL
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TNT
EMS
Payment:
T/T
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