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TDF8599ATH/N2,512

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54
TDF8599A_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 30 June 2009 40 of 54
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
V
P
= 14.4 V; R
i
=4Ω;P
o
=1W.
(1) Channel 1 to channel 2.
(2) Channel 2 to channel 1.
V
P
= 14.4 V; R
i
=4Ω;P
o
=10W.
(1) Channel 1 to channel 2.
(2) Channel 2 to channel 1.
Fig 40. Channel separation as a function of frequency
with 1 W output power
Fig 41. Channel separation as a function of frequency
with 10 W output power
001aaj195
−80
−90
−70
−60
α
cs
(dB)
−100
f (Hz)
10 10
5
10
4
10
2
10
3
(2)
(1)
001aaj196
−80
−90
−70
−60
α
cs
(dB)
−100
f (Hz)
10 10
5
10
4
10
2
10
3
(2)
(1)
(1) V
P
= 14.4 V; R
L
=2Ω at 1 kHz.
(2) V
P
= 14.4 V; R
L
=4Ω at 1 kHz.
(1) V
P
= 14.4 V; R
L
=2Ω at 1 kHz.
(2) V
P
= 14.4 V; R
L
=4Ω at 1 kHz.
Fig 42. Power dissipation as a function of output
power
Fig 43. Efficiency as a function of total output power
P
o
(W)
0504020 3010
001aaj197
10
20
30
P
D
(W)
0
(1)
(2)
P
o
(W)
0504020 3010
001aaj198
40
60
20
80
100
η
(%)
0
(1)
(2)
TDF8599A_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 30 June 2009 41 of 54
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
V
P
=35V; R
L
=4Ω.V
P
=35V; R
L
=4Ω.
Fig 44. Power dissipation as a function of total output
power with both channels driven
Fig 45. Efficiency as a function of total output power
with both channels driven
P
o
(W)
0 15012060 9030
001aaj199
20
10
30
40
P
D
(W)
0
P
o
(W)
0 15012060 9030
001aaj200
40
60
20
80
100
η
(%)
0
V
P
= 14.4 V; V
i
= 1 V RMS.
Fig 46. CMRR as a function of frequency
001aak079
−82
−78
−86
−74
−70
CMRR
(dB)
−90
f (Hz)
10 10
5
10
4
10
2
10
3
TDF8599A_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 30 June 2009 42 of 54
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
14.7 Typical application schematics
Dual BTL mode (stereo) in non-I
2
C-bus mode with DC offset protection disabled, Spread spectrum
mode enabled BD modulation.
(1) See Figure 3 on page 6 for a diagram of the connection for pins EN and SEL_MUTE.
(2) See Section 8.3.2 on page 8 for detailed information.
(3) See Section 8.5.5 on page 16 for detailed information on DC offset protection.
Fig 47. Example application diagram: dual BTL in non-I
2
C-bus mode
001aak080
22 Ω
39 kΩ
10 kΩ
10 kΩ
4.7 kΩ
10 Ω
10 Ω
22 Ω
100 µF
35 V
100 µF
35 V
100 nF
15 nF
470 nF
100 nF
15 nF
470 pF 470 pF
470 pF
470 pF
C
LC
C
IN1P
470 nF
C
IN1N
470 nF
C
IN2P
470 nF
470 nF
2.2 µF
47 µF
C
IN2N
L
LC
L
LC
C
LC
100 nF
PGND1
PGND1
V
P1
V
P1
V
P1
V
P2
V
PA
TDF8599A
bead
bead
bead
bead
OUT1N
OUT1P
OUT1N
V
P
GND
OUT1P
VSTAB1
GNDD/HW
33
32
31
30
29
28
34
35
36
25
24
23
22
21
20
19
26
27
4
5
6
7
8
9
3
2
1
12
13
14
15
16
17
18
11
10
BOOT1N
BOOT1P
V
P1
PGND1
PGND1
PGND2
V
DDD
1000 µF
35 V
100 nF
220 nF
VSTAB2
DCP
OSCIO
220 nF
22 Ω
10 Ω
10 Ω
22 Ω
100 nF
15 nF
100 nF
15 nF
470 pF 470 pF
470 pF
470 pF
C
LC
L
LC
L
LC
C
LC
100 nF
PGND2
V
P2
V
P2
PGND2
OUT2P
OUT2N
OUT2P
OUT2N
BOOT2P
BOOT2N
V
P2
PGND2
IN2N
AGND
IN2P
IN1P
ACGND
SVRR
EN
SEL_MUTE
IN1N
IN2N
100 nF
100 nF
1 µF
(2)
C
ACGND
enable
(1)
mute/on
(1)
IN2P
IN1P
IN1N
SCL
SSM
OSCSET
V
DDA
SDA
V
Pull-up
V
Pull-up
V
PA
BD modulation
setting
MASTER
MODE
non-I
2
C-bus
mode
ADS
DIAG
MOD
CLIP
(3)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54

TDF8599ATH/N2,512

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Buy TDF8599ATH/N2,512
Manufacturer:
NXP Semiconductors
Description:
IC AMP AUDIO PWR D 36HSOP
Lifecycle:
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