TJA1042 All information provided in this document is subject to legal disclaimers. © NXP N.V. 2017. All rights reserved.
Product data sheet Rev. 10 — 24 November 2017 11 of 26
NXP Semiconductors
TJA1042
High-speed CAN transceiver with Standby mode
[1] Only TJA1042T/3 and TJA1042TK/3 have a V
IO
pin. With TJA1042T, the V
IO
input is internally connected to V
CC
.
[2] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to
cover the specified temperature and power supply voltage range.
[3] V
IO
=V
CC
for the non-V
IO
product variant TJA1042T.
[4] Maximum value assumes V
CC
<V
IO
; if V
CC
>V
IO
, the maximum value will be V
CC
+ 0.3 V.
[5] Not tested in production; guaranteed by design.
[6] The test circuit used to measure the bus output voltage symmetry (which includes CSPLIT) is shown in Figure 10
.
[7] For TJA1042T/3 and TJA1042TK/3: values valid when V
IO
= 4.5 V to 5.5 V; when V
IO
= 2.8 V to 4.5 V, values valid when
12 V V
CANL
+12 V, 12 V V
CANH
+12 V.
11. Dynamic characteristics
R
i
input resistance deviation 0 V V
CANL
+5 V;
0V V
CANH
+5 V
[5]
1- +1%
R
i(dif)
differential input resistance 2V V
CANL
+7 V;
2V V
CANH
+7 V
[5]
19 30 52 k
C
i(cm)
common-mode input
capacitance
[5]
--20pF
C
i(dif)
differential input capacitance
[5]
--10pF
Common mode stabilization output; pin SPLIT; only for TJA1042T
V
O
output voltage Normal mode
I
SPLIT
= 500 A to +500 A
0.3V
CC
0.5V
CC
0.7V
CC
V
Normal mode; R
L
=1 M 0.45V
CC
0.5V
CC
0.55V
CC
V
I
L
leakage current Standby mode
V
SPLIT
= 58 V to +58 V
5- +5A
Temperature detection
T
j(sd)
shutdown junction
temperature
[5]
-190-C
Table 7. Static characteristics
…continued
T
vj
=
40
C to +150
C; V
CC
= 4.5 V to 5.5 V; V
IO
= 2.8 V to 5.5 V
[1]
; R
L
=60
unless specified otherwise; All voltages are
defined with respect to ground; Positive currents flow into the IC.
[2]
Symbol Parameter Conditions Min Typ Max Unit
Table 8. Dynamic characteristics
T
vj
=
40
C to +150
C; V
CC
= 4.5 V to 5.5 V; V
IO
= 2.8 V to 5.5 V
[1]
; R
L
=60
unless specified otherwise. All voltages are
defined with respect to ground. Positive currents flow into the IC.
[2]
Symbol Parameter Conditions Min Typ Max Unit
Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 5
and Figure 9
t
d(TXD-busdom)
delay time from TXD to bus dominant Normal mode - 65 - ns
t
d(TXD-busrec)
delay time from TXD to bus recessive Normal mode - 90 - ns
t
d(busdom-RXD)
delay time from bus dominant to RXD Normal mode - 60 - ns
t
d(busrec-RXD)
delay time from bus recessive to RXD Normal mode - 65 - ns
t
d(TXDL-RXDL)
delay time from TXD LOW to RXD LOW version with SPLIT pin;
Normal mode
60 - 220 ns
versions with V
IO
pin;
Normal mode
60 - 250 ns
