2001-2012 Microchip Technology Inc. DS21463C-page 7
TC7650
3.9 Pin Compatibility
On the 8-pin mini-DIP TC7650, the external null stor-
age capacitors are connected to pins 1 and 8. On most
other operational amplifiers these are left open or are
used for offset potentiometer or compensation capaci-
tor connections.
For OP05 and OP07 operational amplifiers, the
replacement of the offset null potentiometer between
pins 1 and 8 by two capacitors from the pins to V
SS
will
convert the OP05/07 pin configurations for TC7650
operation. For LM108 devices, the compensation
capacitor is replaced by the external nulling capacitors.
The LM101/748/709 pinouts are modified similarly by
removing any circuit connections to Pin 5. On the
TC7650, Pin 5 is the output clamp connection.
Other operational amplifiers may use this pin as an off-
set or compensation point.
The minor modifications needed to retrofit a TC7650
into existing sockets operating at reduced power sup-
ply voltages make prototyping and circuit verification
straightforward.
3.10 Input Guarding
High impedance, low leakage CMOS inputs allow the
TC7650 to make measurements of high-impedance
sources. Stray leakage paths can increase input cur-
rents and decrease input resistance unless inputs are
guarded. A guard is a conductive PC trace surrounding
the input terminals. The ring connects to a low imped-
ance point at the same potential as the inputs. Stray
leakages are absorbed by the low impedance ring. The
equal potential between ring and inputs prevents input
leakage currents. Typical guard connections are shown
in Figure 3-6.
The 14-pin DIP configuration has been specifically
designed to ease input guarding. The pins adjacent to
the inputs are unused.
In applications requiring low leakage currents, boards
should be cleaned thoroughly and blown dry after sol-
dering. Protective coatings will prevent future board
contamination.
3.11 Component Selection
The two required capacitors, C
A
and C
B
, have optimum
values, depending on the clock or chopping frequency.
For the preset internal clock, the correct value is 0.1F.
To maintain the same relationship between the chop-
ping frequency and the nulling time constant, the
capacitor values should be scaled in proportion to the
external clock, if used. High quality film type capacitors
(such as Mylar) are preferred; ceramic or other lower
grade capacitors may be suitable in some applications.
For fast settling on initial turn-on, low dielectric absorp-
tion capacitors (such as polypropylene) should be
used. With ceramic capacitors, several seconds may
be required to settle to 1V.
FIGURE 3-6: INPUT GUARD CONNECTION
Input
+
Output
R
2
Inverting Amplifier
Input
+
Output
Follower
Input
+
Output
R
2
R
1
Noninverting Amplifier
R
3
*
R
3
*
Should Be Low
Impedence For
Optimum Guarding
NOTE: R
3
=
R
1
R
2
R
1
+ R
2
R
3
*
R
1
-
-
-
