NCV5171, NCV5173
www.onsemi.com
16
T
J
+ T
A
)(P
D
q
JA
)
where:
T
J
= IC or FET junction temperature (°C);
T
A
= ambient temperature (°C);
P
D
= power dissipated by part in question (W);
q
JA
= junction−to−ambient thermal resistance (°C/W).
For the NCV5171/73, q
JA
=165°C/W.
Once the designer has calculated T
J
, the question of
whether the NCV5171/73 can be used in an application is
settled. If T
J
exceeds 150°C, the absolute maximum
allowable junction temperature, the NCV5171/73 is not
suitable for that application.
If T
J
approaches 150°C, the designer should consider
possible means of reducing the junction temperature.
Perhaps another converter topology could be selected to
reduce the switch current. Increasing the airflow across the
surface of the chip might be considered to reduce T
A
.
Circuit Layout Guidelines
In any switching power supply, circuit layout is very
important for proper operation. Rapidly switching currents
combined with trace inductance generates voltage
transitions that can cause problems. Therefore the following
guidelines should be followed in the layout.
1. In boost circuits, high AC current circulates within the
loop composed of the diode, output capacitor, and
on−chip power transistor. The length of associated
traces and leads should be kept as short as possible. In
the flyback circuit, high AC current loops exist on both
sides of the transformer. On the primary side, the loop
consists of the input capacitor, transformer, and
on−chip power transistor, while the transformer,
rectifier diodes, and output capacitors form another
loop on the secondary side. Just as in the boost circuit,
all traces and leads containing large AC currents
should be kept short.
2. Separate the low current signal grounds from the
power grounds. Use single point grounding or ground
plane construction for the best results.
3. Locate the voltage feedback resistors as near the IC as
possible to keep the sensitive feedback wiring short.
Connect feedback resistors to the low current analog
ground.
