AFBR-5903Z Datasheet AFBR-5903Z, AFBR-5903EZ, AFBR-5903AZ | P1-P3

AFBR-5903Z/5903EZ/5903AZ

FDDI, Fast Ethernet Transceivers

in 2 x 5 Package Style

Data Sheet

Features

• Multisourced 2 x 5 package style with MT-RJ

receptacle

• Single +3.3 V power supply

• Wave solder and aqueous wash process compatible

• Full compliance with the optical performance

requirements of the FDDI PMD standard

• Full compliance with the FDDI LCF-PMD standard

• Full compliance with the optical performance

requirements of the ATM 100 Mb/s physical layer

• Full compliance with the optical performance

requirements of 100 Base-FX version of IEEE 802.3u

• “RoHS” compliance

• Receiver output squelch function enabled

Applications

• Multimode ber backbone links

• Multimode ber wiring closet to desktop links

Ordering Information

The AFBR-5903Z 1300 nm product is available for pro-

duction orders through the Avago Technologies Com-

ponent Field Sales Oces and Authorized Distributors

world wide.

AFBR-5903Z = 0°C to +70°C

No Shield

AFBR-5903EZ = 0°C to +70°C

Extended Shield

AFBR-5903AZ = -40°C to +85°C

No Shield.

Description

The AFBR-5903Z family of transceivers from Avago Tech-

nologies provide the system designer with products

to implement a range of FDDI and ATM (Asynchronous

Transfer Mode) designs at the 100 Mb/s-125 MBd rate.

The transceivers are all supplied in the new industry

standard 2 x 5 DIP style with a MT-RJ ber connector

interface.

FDDI PMD, ATM and Fast Ethernet 2 km Backbone Links

The AFBR-5903Z is a 1300 nm product with optical per-

formance compliant with the FDDI PMD standard. The

FDDI PMD standard is ISO/IEC 9314-3: 1990 and ANSI

X3.166 - 1990.

These transceivers for 2 km multimode ber backbones

are supplied in the small 2 x 5 MT-RJ package style for

those designers who want to avoid the larger MIC/R

(Media Interface Connector/Receptacle) dened in the

FDDI PMD standard.

Avago Technologies also provides several other FDDI

products compliant with the PMD and SM-PMD standards.

These products are available with MIC/R, ST

, SC and FC

connector styles. They are available in the 1 x 9, 1 x 13 and

2 x 11 transceiver and 16 pin transmitter/receiver pack-

age styles for those designs that require these alternate

congurations.

The AFBR-5903Z is also useful for both ATM 100 Mb/s

interfaces and Fast Ethernet 100 Base-FX interfaces. The

ATM Forum User-Network Interface (UNI) Standard, Version

3.0, denes the Physical Layer for 100 Mb/s Multimode

Fiber Interface for ATM in Section 2.3 to be the FDDI PMD

Standard. Likewise, the Fast Ethernet Alliance denes the

Physical Layer for 100 Base-FX for Fast Ethernet to be the

FDDI PMD Standard.

ATM applications for physical layers other than 100

Mb/s Multimode Fiber Interface are supported by

Avago Technologies. Products are available for both

the single-mode and the multimode ber SONET OC-3c

(STS-3c), SDH (STM-1) ATM interfaces and the 155 Mb/s-

194 MBd multimode ber ATM interface as specied

in the ATM Forum UNI.

Contact your Avago Technologies sales representa-

tive for information on these alternative FDDI and ATM

products.

Transmitter Sections

The transmitter section of the AFBR-5903Z utilizes a 1300

nm Surface Emitting InGaAsP LED. This LED is packaged

in the optical subassembly portion of the transmitter

section. It is driven by a custom silicon IC which converts

dierential PECL logic signals, ECL referenced (shifted) to

a +3.3 V supply, into an analog LED drive current.

Receiver Sections

The receiver section of the AFBR-5903Z utilizes an InGaAs

PIN photodiode coupled to a custom silicon transimped-

ance preamplier IC. It is packaged in the optical sub-

assembly portion of the receiver.

This PIN/preamplier combination is coupled to a custom

quantizer IC which provides the nal pulse shaping for

the logic output and the Signal Detect function. The Data

output is dierential. The Signal Detect output is single-

ended. Both Data and Signal Detect outputs are PECL

compatible, ECL referenced (shifted) to a +3.3 V power

supply. The receiver outputs, Data Out and Data Out Bar,

are squelched at Signal Detect Deassert. That is, when the

light input power decreases to a typical -38 dBm or less,

the Signal Detect Deasserts, i.e. the Signal Detect output

goes to a PECL low state. This forces the receiver outputs,

Data Out and Data Out Bar to go to steady PECL levels

High and Low respectively.

Package

The overall package concept for the Avago Technologies

transceiver consists of the following basic elements; two

optical subassemblies, an electrical subassembly and the

housing as illustrated in Figure 1.

The package outline drawing and pin out are shown in Figures

2 and 3. The details of this package outline and pin out are

compliant with the multisource denition of the 2 x 5 DIP.

The low prole of the Avago Technologies transceiver design

complies with the maximum height allowed for the MT-RJ

connector over the entire length of the package.

The optical subassemblies utilize a high-volume assembly

process together with low-cost lens elements which result

in a cost-eective building block.

The electrical subassembly consists of a high volume mul-

tilayer printed circuit board on which the IC and various

surface-mounted passive circuit elements are attached.

The receiver section includes an internal shield for the elec-

trical and optical subassemblies to ensure high immunity to

external EMI elds.

The outer housing is electrically conductive and is at receiver

signal ground potential. The MT-RJ port is molded of lled

nonconductive plastic to provide mechanical strength

and electrical isolation. The solder posts of the Avago

Technologies design are isolated from the internal circuit

of the transceiver.

The transceiver is attached to a printed circuit board with

the ten signal pins and the two solder posts which exit

the bottom of the housing. The two solder posts provide

the primary mechanical strength to withstand the loads

imposed on the transceiver by mating with the MT-RJ

connectored ber cables.

Figure 1. Block Diagram.

DATA OUT

SIGNAL

DETECT

DATA IN

QUANTIZER IC

LED DRIVER IC

PIN PHOTODIODE

PRE-AMPLIFIER

SUBASSEMBLY

LED OPTICAL

SUBASSEMBLY

DATA OUT

DATA IN

MT-RJ

RECEPTACLE

RX SUPPLY

TX SUPPLY

X GROUND

TX GROUND

Figure 2. Package Outline Drawing

Note:

YYWW Manufactured WorkWeek

COO Country Of Origin (Philippines)

FRONT VIEW

13.97

(0.55)

MIN.

4.5 ±0.2

(0.177 ±0.008)

(PCB to OPTICS

CENTER LINE)

5.15

(0.20)

(PCB to OVERALL

RECEPTACLE CENTER

LINE)

DIMENSIONS IN MILLIMETERS (INCHES)

NOTES:

1. THIS PAGE DESCRIBES THE MAXIMUM PACKAGE OUTLINE, MOUNTING STUDS, PINS AND THEIR RELATIONSHIPS TO EACH OTHER.

2. TOLERANCED TO ACCOMMODATE ROUND OR RECTANGULAR LEADS.

3. ALL 12 PINS AND POSTS ARE TO BE TREATED AS A SINGLE PATTERN.

4. THE MT-RJ HAS A 750 µm FIBER SPACING.

5. THE MT-RJ ALIGNMENT PINS ARE IN THE MODULE.

6. FOR SM MODULES, THE FERRULE WILL BE PC POLISHED (NOT ANGLED).

7. SEE MT-RJ TRANSCEIVER PIN OUT DIAGRAM FOR DETAILS.

37.56 (1.479) MAX.

SIDE VIEW

49.56 (1.951) REF.

9.8

(0.386)

MAX.

9.3

(0.366)

MAX.

Ø 1.07

(0.042)

Ø 0.61

(0.024)

Pin 1

TOP VIEW

9.6

(0.378)

MAX.

13.59

(0.535)

MAX.

(0.472)

7.59

(0.299)

8.6

(0.339)

Ø1.5

(0.059)

17.778

(0.7)

1.778

(0.07)

7.112

(0.28)

-0.2

(+000)

(-008)

10.16

(0.4)

Case Temperature

Measurement Point

Min 2.92

(0.115)

Labelling Information

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P16

AFBR-5903Z

Mfr. #:

Buy AFBR-5903Z

Manufacturer:

Broadcom / Avago

Description:

Fiber Optic Transmitters, Receivers, Transceivers Transceiver

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

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AFBR-5903Z

AFBR-5903Z

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