74VHC00FT Datasheet 74VHC00FT | P1-P3

74VHC00FT

1

CMOS Digital Integrated Circuits Silicon Monolithic

74VHC00FT

Start of commercial production

2013-01

1.

1. Functional Description

Functional Description

• Quad 2-Input NAND Gate

2.

2. General

General

The 74VHC00FT is an advanced high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate C

2

MOS

technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS

low power dissipation.

The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and

stable output.

An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply

voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.

This circuit prevents device destruction due to mismatched supply and input voltages.

3.

3. Features

Features

(1) AEC-Q100 (Rev. H) (Note 1)

(2) Wide operating temperature: T

opr

= -40 to 125 

(3) High speed: t

pd

= 3.7 ns (typ.) V

CC

= 5.0 V

(4) Low power dissipation: I

CC

= 2.0 µA (max) T

a

= 25 

(5) High noise immunity: V

NIH

= V

NIL

= 28 % V

CC

(min)

(6) Power-down protection is provided on all inputs.

(7) Balanced propagation delays: t

PLH

≈ t

PHL

(8) Wide operating voltage range: V

CC(opr)

= 2.0 V to 5.5 V

(9) Low noise: V

OLP

= 0.8 V (max)

(10) Pin and function compatible with the 74 series (AC/HC/AHC/LV etc.) 00 type.

Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales

representative.

4.

4. Packaging

Packaging

TSSOP14B

2016-07-07

Rev.5.0

74VHC00FT

2

5.

5. Pin Assignment

Pin Assignment

6.

6. Marking

Marking

7.

7. IEC Logic Symbol

IEC Logic Symbol

2016-07-07

Rev.5.0

74VHC00FT

3

8.

8. Truth Table

Truth Table

A

L

H

B

L

H

L

H

Y

H

L

9.

9. Absolute Maximum Ratings (Note)

Absolute Maximum Ratings (Note)

Characteristics

Supply voltage

Input voltage

Output voltage

Input diode current

Output diode current

Output current

V

CC

/ground current

Power dissipation

Storage temperature

Symbol

V

CC

V

IN

V

OUT

I

IK

I

OK

I

OUT

I

CC

P

D

T

stg

Note

(Note 1)

Rating

-0.5 to 7.0

-0.5 to V

CC

+ 0.5

-20

±20

±25

±50

180

-65 to 150

Unit

V

mA

mW



Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even

destruction.

Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the

significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even

if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum

ratings and the operating ranges.

Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook

(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report

and estimated failure rate, etc).

Note 1: 180 mW in the range of T

a

= -40 to 85 . From T

a

= 85 to 125  a derating factor of -3.25 mW/ shall be

applied until 50 mW.

10.

10. Operating Ranges (Note)

Operating Ranges (Note)

Characteristics

Supply voltage

Input voltage

Output voltage

Operating temperature

Input rise and fall times

Symbol

V

CC

V

IN

V

OUT

T

opr

dt/dv

Test Condition

V

CC

= 3.3 ± 0.3 V

V

CC

= 5.0 ± 0.5 V

Rating

2.0 to 5.5

0 to 5.5

0 to V

CC

-40 to 125

0 to 100

0 to 20

Unit

V



ns/V

Note: The operating ranges must be maintained to ensure the normal operation of the device.

Unused inputs must be tied to either V

CC

or GND.

2016-07-07

Rev.5.0

74VHC00FT

74VHC00FT

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