ZY2160 60A No-Bus POL Data Sheet
8V to 14V Input
• 0.5V to 2.75V Output
ZD-01966 Rev. 1.3, 11-Oct-2011 www.power-one.com
Page 12 of 14
8. Safety
The ZY2160 POL converters do not provide
isolation from input to output. The input devices
powering ZY2160 must provide relevant isolation
requirements according to all IEC60950 based
standards. Nevertheless, if the system using the
converter needs to receive safety agency approval,
certain rules must be followed in the design of the
system. In particular, all of the creepage and
clearance requirements of the end-use safety
requirements must be observed. These
requirements are included in UL60950 - CSA60950-
00 and EN60950, although specific applications may
have other or additional requirements.
The ZY2160 POL converters have no internal fuse.
If required, the external fuse needs to be provided to
protect the converter from catastrophic failure. Refer
to the “Input Fuse Selection for DC/DC converters”
application note on
www.power-one.com
9. Pin and Feature Description
for proper
selection of the input fuse. Both input traces and the
chassis ground trace (if applicable) must be capable
of conducting a current of 1.5 times the value of the
fuse without opening. The fuse must not be placed
in the grounded input line.
Abnormal and component failure tests were
conducted with the POL input protected by a fast-
acting 32V, 25A, fuse. If a fuse rated greater than
25A is used, additional testing may be required.
In order for the output of the ZY2160 POL converter
to be considered as SELV (Safety Extra Low
Voltage), according to all IEC60950 based
standards, the input to the POL needs to be supplied
by an isolated secondary source providing a SELV
also.
9.1 OK, Fault Status
The open drain input/output with the internal pull-up
resistor. The POL converter pulls its OK pin low, if a
fault occurs. Pulling low the OK input by an external
circuitry turns off the POL converter.
9.2 SYNC, Frequency Synchronization Line
The bidirectional input/output with the internal pull-up
resistor. If the POL converter is configured as a
master, the SYNC line propagates clock to other
POL converters. If the POL converter is configured
as a slave, the internal clock recovery circuit
synchronizes the POL converter to the clock of the
SYNC line.
9.3 IM, Interleave Mode
The input with the internal pull-up resistor. When the
pin is left floating, the switching frequency is
determined by an external clock applied to the SYNC
pin. Pulling the IM pin low configures a POL
converter as a master. The master determines the
clock on the SYNC line.
9.4 PG, Power Good
The open drain input/output with the internal pull-up
resistor. The pin is pulled low by the POL converter,
if the output voltage is outside of the window defined
by the Power Good High and Low thresholds.
Note: See the No-Bus Application Note for recommendations on
PG deglitching.
9.5 CCA, Compensation Coefficient Address
Inputs with internal pull-ups to select one of 2 sets of
digital filter coefficients optimized for different
characteristics of output capacitance.
9.6 CS, Current Share/Sense Bus
The open drain digital input/output with the internal
pull-up resistor. The duty cycle of the digital signal is
proportional to the output current of the POL
converter. External capacitive loading of the pin
shall be avoided.
9.7 MARGIN, Output Voltage Margining
The output of the 2V internal voltage reference that
is used to program the output voltage of the POL
converter.
9.8 TRIM, Output Voltage Trim
The input of the TRIM comparator for the output
voltage programming.
The output voltage is programmed by a single
resistor connected between MARGIN and TRIM
pins.
9.9 EN, Enable
The input with the internal pull-up resistor. The POL
converter is turned off, when the pin is pulled low
9.10 –VS and +VS
The differential voltage input of the POL converter
feedback loop.
