CAT5112ZI-50-T3

CAT5112
Doc. No. MD-2002 Rev. N 4 © 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
Logic Inputs
Symbol Parameter Conditions Min Typ Max Units
I
IH
Input Leakage Current V
IN
= V
CC
10 µA
I
IL
Input Leakage Current V
IN
= 0V -10 µA
V
IH1
TTL High Level Input Voltage 2 V
CC
V
V
IL1
TTL Low Level Input Voltage
4.5V V
CC
5.5V
0 – 0.8 V
V
IH2
CMOS High Level Input Voltage V
CC
x 0.7 V
CC
+ 0.3 V
V
IL2
CMOS Low Level Input Voltage
2.5V V
CC
6V
-0.3 – V
CC
x 0.2 V
Potentiometer Characteristics
Symbol Parameter Conditions Min Typ Max Units
-10 Device 10
-50 Device 50
R
POT
Potentiometer Resistance
-00 Device 100
k
Pot. Resistance Tolerance ±20 %
V
RH
Voltage on R
H
pin 0 V
CC
V
V
RL
Voltage on R
L
pin 0 V
CC
V
Resolution 1 %
INL Integral Linearity Error I
W
2µA 0.5 1 LSB
DNL Differential Linearity Error I
W
2µA 0.25 0.5 LSB
R
OUT
Buffer Output Resistance
0.05V
CC
V
WB
0.95V
CC
,
V
CC
= 5V
1
I
OUT
Buffer Output Current
0.05V
CC
V
WB
0.95V
CC
,
V
CC
= 5V
3 mA
TC
RPOT
TC of Pot Resistance 300 ppm/ºC
TC
RATIO
Ratiometric TC 20 ppm/ºC
C
RH
/C
RL
/C
RW
Potentiometer Capacitances 8/8/25 pF
fc Frequency Response Passive Attenuator, 10k 1.7 MHz
V
WB(SWING)
Output Voltage Range I
OUT
100µA, V
CC
= 5V 0.01V
CC
0.99V
CC
CAT5112
© 2008 SCILLC. All rights reserved. 5 Doc. No. MD-2002 Rev. N
Characteristics subject to change without notice
AC CONDITIONS OF TEST
V
CC
Range 2.5V V
CC
6V
Input Pulse Levels 0.2V
CC
to 0.7V
CC
Input Rise and Fall Times 10ns
Input Reference Levels 0.5V
CC
AC OPERATING CHARACTERISTICS
V
CC
= +2.5V to +6.0V, V
H
= V
CC
, V
L
= 0V, unless otherwise specified
Symbol Parameter Min Typ
(1)
Max Units
t
CI
CS
¯¯
to INC
¯¯¯
Setup
100 ns
t
DI
U/D
¯
to INC
¯¯¯
Setup
50 ns
t
ID
U/D
¯
to INC
¯¯¯
Hold
100 ns
t
IL
INC
¯¯¯
LOW Period
250 ns
t
IH
INC
¯¯¯
HIGH Period
250 ns
t
IC
INC
¯¯¯
Inactive to CS
¯¯
Inactive
1 µs
t
CPH
CS
¯¯
Deselect Time (NO STORE)
100 ns
t
CPH
CS
¯¯
Deselect Time (STORE)
10 ms
t
IW
INC
¯¯¯
to V
OUT
Change
1 5 µs
t
CYC
INC
¯¯¯
Cycle Time
1 µs
t
R
, t
F
(2)
INC
¯¯¯
Input Rise and Fall Time
500 µs
t
PU
(2)
Power-up to Wiper Stable 1 ms
t
WR
Store Cycle 5 10 ms
A.C. TIMING
Notes:
(1) Typical values are for T
A
= 25ºC and nominal supply voltage.
(2) This parameter is periodically sampled and not 100% tested.
(3) MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
CS
INC
U/D
R
WB
t
CI
t
IL
MI
(3)
90% 90%
10%
(store)
t
CYC
t
IH
t
IC
t
CPH
t
F
t
R
t
DI
t
ID
t
IW
CAT5112
Doc. No. MD-2002 Rev. N 6 © 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
PACKAGE OUTLINE DRAWINGS
PDIP 8-Lead 300mil (L)
(1)(2)
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC Specification MS-001.
For current Tape and Reel information, download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
E1
D
A
L
eb
b2
A1
A2
E
eB
c
TOP VIEW
SIDE VIEW END VIEW
PIN # 1
IDENTIFICATION
SYMBOL MIN NOM MAX
A5.33
A1 0.38
A2 2.92 3.30 4.95
b 0.36 0.46 0.56
b2 1.14 1.52 1.78
c 0.20 0.25 0.36
D 9.02 9.27 10.16
E 7.62 7.87 8.25
e 2.54 BSC
E1 6.10 6.35 7.11
eB 7.87 10.92
L 2.92 3.30 3.80

CAT5112ZI-50-T3

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Digital Potentiometer ICs DPP NV 32 taps Up/Down w/Buf
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union