4
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT38075
3.3V CMOS 1-TO-5 CLOCK DRIVER
tPLH1
OUTPUT 1
OUTPUT 2
tSK(o)
tPLH2
3V
0V
V
OH
1.5V
1.5V
V
OL
VOH
1.5V
V
OL
INPUT
tPHL1
tPHL2
tSK(o)
tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
3V
0V
VOH
tPLH tPHL
VOL
1.5V
1.5V
tR
tF
2.0V
0.8V
INPUT
OUTPUT
INPUT
tPLH1
PACKAGE 1 OUTPUT
PACKAGE 2 OUTPUT
t
SK(PP)
tPLH2
3V
0V
V
OH
1.5V
1.5V
V
OL
VOH
1.5V
V
OL
tPHL1
tPHL2
tSK(PP)
tSK(PP) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
tPLH
tPHL
3V
0V
V
OH
1.5V
1.5V
V
OL
tSK(p) = |tPHL - tPLH|
INPUT
OUTPUT
TEST WAVEFORMS
Pulse Skew - tSK(P)
Part-to-Part Skew - tSK(PP)
Output Skew - tSK(O)
Propagation Delay
TEST CIRCUITS
15pF
C
L
D.U.T.
Pulse
Generator
VIN
VCC
RT
VOUT
RL
CL = 15pF Circuit
TEST CONDITIONS
Symbol VCC = 3.3V ±0.3V Unit
CL 15 pF
RL 33 Ω
RT ZOUT of pulse generator Ω
tR / tF 1 (0V to 3V or 3V to 0V) ns
DEFINITIONS:
C
L = Load capacitance: includes jig and probe capacitance.
R
T = Termination resistance: should be equal to ZOUT of the Pulse Generator.
tR / tF = Rise/Fall time of the input stimulus from the Pulse Generator.
Part-to-Part Skew is for the same package and speed grade.
