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TEA1792T/N1,118

P1-P3P4-P6P7-P9P10-P12P13-P13
TEA1792T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 9 July 2012 4 of 13
NXP Semiconductors
TEA1792T
GreenChip synchronous rectifier controller
7. Functional description
7.1 Introduction
The TEA1792T is the controller for synchronous rectification used in discontinuous
conduction mode and quasi-resonant flyback converters.
7.2 Start-up and UnderVoltage LockOut (UVLO)
The IC leaves the undervoltage lockout state and activates the synchronous rectifier
circuitry when the voltage on the V
CC
pin is above 8.5 V (typical). When the voltage drops
below 8.0 V (typical), the undervoltage lockout state is entered again and the SR driver
output is actively kept low.
7.3 Synchronous rectification
After a negative voltage lower than V
act(drv)
(220 mV typical) is sensed on the SRSENSE
pin, the driver output voltage is driven HIGH. Then the external MOSFET is switched on.
When the SRSENSE voltage rises to V
reg(drv)
42 mV/30 mV), the driver output voltage
is regulated to maintain the V
reg(drv)
on the SRSENSE pin. When the SRSENSE voltage is
above the V
deact(drv)
level (12 mV typical), the driver output is pulled to ground.
After switch-on of the SR MOSFET, the input signal on the SRSENSE pin is blanked
during the t
act(sr)(min)
(1.8 s typical). This action eliminates false switch-off due to high
frequency ringing at the start of the secondary stroke.
When the voltage on the SRSENSE pin is V
reg(drv)
, the driver output voltage is reduced.
This reduction enables the external power switch to be switched off quickly when the
current through the switch reaches zero. The zero current switch-off removes the need for
a separate Standby mode to maintain high efficiency during the no-load operation. The
zero current is detected by sensing a V
deact(drv)
(12 mV typical) level on the SRSENSE
pin (see Figure 3
).
TEA1792T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 9 July 2012 5 of 13
NXP Semiconductors
TEA1792T
GreenChip synchronous rectifier controller
The level of the driver regulation voltage V
reg(drv)
can be selected using the SELREG pin.
When this SELREG pin is grounded, the typical V
reg(drv)
equals 42 mV. When the
SELREG pin is left open, the V
reg(drv)
level equals 30 mV.
Internally, the SELREG pin has a pull-up current source of 10 µA. When this pin is short
circuited to ground, the pin selects the lowest V
reg(drv)
. If the pin is left open, the highest
V
reg(drv)
value is selected.
If the secondary stroke of the flyback converter is shorter than t
act(sr)(min)
short time (1.8 s
typical), the driver output is disabled. This action guarantees stable operation for very low
duty cycles. When the secondary stroke increases above t
act(sr)(min)
, long time (2.1 s
typical), the driver output is again enabled.
7.4 Supply management
All internal reference voltages are derived from a temperature compensated, on-chip
band gap circuit.
7.5 Driver
The driver circuit to the external power MOSFET gate has a typical source capability of
400 mA and a typical sink capability of 2.7 A. These capabilities permit fast switch-on and
switch-off of the power MOSFET for efficient operation. The source stage is coupled to the
timer (see Figure 1
). When the timer has finished, the source capability is reduced to a
small current (5 mA typical) capable of keeping the driver output voltage at its level.
Fig 3. Synchronous rectification signals
aaa-000137
0 V
V
deact(drv)
(-12 mV typ.)
V
reg(drv)
(-42 mV/-30 mV typ.)
V
act(drv)
(-220 mV typ.)
0 A
0 A
0 V
V
SRSENSE
V
DRIVER
primary
current
secondary
current
TEA1792T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 9 July 2012 6 of 13
NXP Semiconductors
TEA1792T
GreenChip synchronous rectifier controller
The output voltage of the driver is limited to 10 V (typical). This high output voltage drives
all MOSFET brands to the minimum on-state resistance.
During start-up conditions (V
CC
<V
startup
) and undervoltage lockout the driver output
voltage is actively pulled low.
8. Limiting values
[1] Equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor.
9. Thermal characteristics
Table 3. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are measured
with respect to ground (pin 2); positive currents flow into the chip. The voltage ratings and current
ratings are valid provided the other ratings are not violated.
Symbol Parameter Conditions Min Max Unit
Voltages
V
CC
supply voltage continuous 0.4 +38 V
V
SRSENSE
voltage on pin SRSENSE continuous - 120 V
V
SELREG
voltage on pin SELREG continuous 0.4 +5 V
Currents
I
DRIVER
current on pin DRIVER duty cycle < 10 % 0.8 +3 A
I
SRSENSE
current on pin SRSENSE 3- mA
General
P
tot
total power dissipation T
amb
<80C-0.45W
T
stg
storage temperature 55 +150 C
T
j
junction temperature 40 +150 C
V
ESD
electrostatic discharge
voltage
human body model; JEDEC
Class 2; all pins
[1]
2+2 kV
charged device model;
JEDEC Class 3; all pins
500 +500 V
Table 4. Thermal characteristics
Symbol Parameter Conditions Typ Unit
R
th(j-a)
thermal resistance from junction
to ambient
JEDEC test board 157 K/W
R
th(j-c)
thermal resistance from junction
to case
JEDEC test board 90 K/W
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TEA1792T/N1,118

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Power Management Specialized - PMIC 20V 0.45W 10%
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