CS8361
http://onsemi.com
5
C1*
0.1 mF
GND
CS8361 MCU
B+
V
IN
V
TRK
Adj
ENABLE
RESET
V
STBY
R3
V
DD
C2**
10 mF
ESR < 8.0 W
5.0 V, 100 mA
RESET
I/O
C3**
10 mF
ESR < 8.0 W
SW 5.0 V,
250 mA
GND
*C1 is required if regulator is located far from power supply filter.
**C2 and C3 are required for stability.
Figure 3. Test and Application Circuit, Dual 5.0 V Regulator
APPLICATION NOTES
External Capacitors
Output capacitors for the CS8361 are required for
stability. Without them, the regulator outputs will oscillate.
Actual size and type may vary depending upon the
application load and temperature range. Capacitor effective
series resistance (ESR) is also a factor in the IC stability.
Worst−case is determined at the minimum ambient
temperature and maximum load expected.
Output capacitors can be increased in size to any desired
value above the minimum. One possible purpose of this
would be to maintain the output voltages during brief
conditions of negative input transients that might be
characteristic of a particular system.
Capacitors must also be rated at all ambient temperatures
expected in the system. To maintain regulator stability down
to −40°C, capacitors rated at that temperature must be used.
More information on capacitor selection for SMART
REGULATOR®s is available in the SMART REGULATOR
application note, “Compensation for Linear Regulators,”
document number SR003AN/D, available through the
Literature Distribution Center or via our website at
http://www.onsemi.com.
Calculating Power Dissipation in a
Dual Output Linear Regulator
The maximum power dissipation for a dual output
regulator (Figure 4) is
P
D(max)
+
NJ
V
IN(max)
* V
OUT1(min)
Nj
I
OUT1(max)
)
NJ
V
IN(max)
* V
OUT2(min)
Nj
I
OUT2(max)
) V
IN(max)
IQ
(1)
where:
V
IN(max)
is the maximum input voltage,
V
OUT1(min)
is the minimum output voltage from V
OUT1
,
V
OUT2(min)
is the minimum output voltage from V
OUT2
,
I
OUT1(max)
is the maximum output current, for the
application,
I
OUT2(max)
is the maximum output current, for the
application, and
I
Q
is the quiescent current the regulator consumes at both
I
OUT1(max)
and I
OUT2(max)
.
Once the value of P
D(max)
is known, the maximum
permissible value of R
q
JA
can be calculated:
R
QJA
+
150° C * T
A
P
D
(2)
The value of R
q
JA
can be compared with those in the
package section of the data sheet. Those packages with
R
q
JA
’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
Figure 4. Dual Output Regulator With Key
Performance Parameters Labeled.
SMART
REGULATOR
Control
Features
V
OUT1
I
OUT1
V
OUT2
I
OUT2
V
IN
I
IN
I
Q
