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HEF4007UBT,653

P1-P3P4-P6P7-P9P10-P12P13-P15
Nexperia
HEF4007UB
Dual complementary pair and inverter
HEF4007UB All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 4 — 31 August 2017
7 / 15
9.2 Characteristics
V
I
(V)
0 5
aaa-027313
2.5
2.5
5
0
0.5
1
0
V
O
I
D
V
O
(V)
I
D
(mA)
a. V
DD
= 5 V; T
amb
= 25 °C
V
I
(V)
0 10
aaa-027314
5
5
10
V
O
(V)
I
D
(mA)
0
5
10
0
V
O
I
D
b. V
DD
= 10 V; T
amb
= 25 °C
V
I
(V)
0 20
aaa-027315
10
10
20
V
O
(V)
I
D
(mA)
0
10
20
0
V
O
I
D
c. V
DD
= 15 V; T
amb
= 25 °C
Figure 5. Typical drain current I
D
and output voltage V
O
as functions of input voltage
Nexperia
HEF4007UB
Dual complementary pair and inverter
HEF4007UB All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 4 — 31 August 2017
8 / 15
10 Application information
Some examples of applications for the HEF4007UB are:
• High input impedance amplifiers
• Linear amplifiers
• (Crystal) oscillators
• High-current sink and source drivers
• High impedance buffers
Note:
Rules for maintaining electrical isolation between transistors and monolithic substrate:
• The V
DD
supply pin (Pin 14) must be maintained at the most positive (or equally
positive) potential with respect to any other pin of the HEF4007UB.
• The V
SS
ground pin (Pin 7) must be maintained at the most positive (or equally
positive) potential with respect to any other pin of the HEF4007UB.
Violation of these rules will result in improper transistor operation and/or possible
permanent damage to the HEF4007UB.
Figure 6 and Figure 7 show voltage gain and supply current. Figure 8 shows the test
set-up and an example of an analog amplifier using one HEF4007UB.
V
DD
(V)
0 15105
001aag156
25
50
typ
75
gain
(V
O
/V
I
)
0
Figure 6. Typical voltage gain as a function of supply
voltage
001aag157
V
DD
(V)
0 15105
10
5
15
20
I
DD
(mA)
0
typ
Figure 7. Typical supply current as a function of supply
voltage
aaa-027316
1/3 HEF4007UB
330 kΩ
Figure 8. Test set-up
Nexperia
HEF4007UB
Dual complementary pair and inverter
HEF4007UB All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved.
Product data sheet Rev. 4 — 31 August 2017
9 / 15
Figure 9 shows typical forward transconductance and Figure 10 shows the test set-up.
001aag164
V
DD
(V)
0 15105
5.0
2.5
7.5
10
g
fs
(mA/V)
0
(1)
(2)
(3)
(1) Average +2σ; where: ‘σ’ is the standard deviation.
(2) Average.
(3) Average -2σ; where: ‘σ’ is the standard deviation.
Figure 9. Typical forward transconductance as a
function of supply voltage at T
amb
= 25 °C
at V
O
is constant.
f
i
= 1 kHz
Figure 10. Test set-up
Figure 11, Figure 12, Figure 13 and Figure 14 show some applications in which the
HEF4007UB is used.
aaa-027317
4 MHz
V
DD
P
13
6
8
N
4.7 kΩ
2.5 pF100 pF10 MΩ
V
SS
Figure 11. 4 MHz crystal oscillator
aaa-027318
V
DD
P
13
6
input
8 5
4
3 10
N
V
SS
output
N
12
9
N
Figure 12. High current sink driver
P1-P3P4-P6P7-P9P10-P12P13-P15

HEF4007UBT,653

Mfr. #:
Buy HEF4007UBT,653
Manufacturer:
Nexperia
Description:
Buffers & Line Drivers DUAL CMPLEMENTARY
Lifecycle:
New from this manufacturer.
Delivery:
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