REV. A
ADE7757
–9–
Nonsinusoidal Voltage and Current
The real power calculation method also holds true for
nonsinusoidal current and voltage waveforms. All voltage and
current waveforms in practical applications will have some har-
monic content. Using the Fourier Transform, instantaneous
voltage and current waveforms can be expressed in terms of
their harmonic content.
vt V 2
0
()
=+ × × +
()
Σ
ho
hh
Vhtsin
ωα
(1)
where:
v(t) is the instantaneous voltage.
V
0
is the average value.
V
h
is the rms value of voltage harmonic h.
h
is the phase angle of the voltage harmonic.
it I
0
()
=+ × × +
()
2 Σ
ho
hh
Ihtsin
ωβ
(2)
where:
i(t) is the instantaneous current.
I
0
is the dc component.
I
h
is the rms value of current harmonic h.
h
is the phase angle of the current harmonic.
Using Equations 1 and 2, the real power P can be expressed in
terms of its fundamental real power (P
1
) and harmonic real
power (P
H
).
PPP
H
=+
1
where
PV I
111 1
111
=
cos
φ
φαβ
(3)
and
PVI
H
h
hh h
hhh
=∑ ×
=
1
cos
φ
φαβ
(4)
As can be seen from Equation 4, a harmonic real power compo-
nent is generated for every harmonic, provided that harmonic is
present in both the voltage and current waveforms. The power
factor calculation has previously been shown to be accurate in
the case of a pure sinusoid. Therefore, the harmonic real power
must also correctly account for power factor since it is made up
of a series of pure sinusoids.
Note that the input bandwidth of the analog inputs is 7 kHz at
the nominal internal oscillator frequency of 450 kHz.
ANALOG INPUTS
Channel V1 (Current Channel)
The voltage output from the current sensor is connected to the
ADE7757 here. Channel V1 is a fully differential voltage input.
V1P is the positive input with respect to V1N.
The maximum peak differential signal on Channel V1 should be
less than ±30 mV (21 mV rms for a pure sinusoidal signal) for
specified operation.
+30mV
–30mV
V
CM
V1
DIFFERENTIAL INPUT
30mV MAX PEAK
COMMON-MODE
6.25mV MAX
+
V1P
V1N
V1
+
V
CM
AGND
Figure 5. Maximum Signal Levels, Channel V1
The diagram in Figure 5 illustrates the maximum signal levels
on V1P and V1N. The maximum differential voltage is ±30 mV.
The differential voltage signal on the inputs must be referenced
to a common mode, e.g., AGND. The maximum common-
mode signal is ±6.25 mV, as shown in Figure 5.
Channel V2 (Voltage Channel)
The output of the line voltage sensor is connected to the
ADE7757 at this analog input. Channel V2 is a fully differen-
tial voltage input with a maximum peak differential signal of
± 165 mV. Figure 6 illustrates the maximum signal levels that
can be connected to the ADE7757 Channel V2.
+165mV
–165mV
V
CM
V2
DIFFERENTIAL INPUT
165mV MAX PEAK
COMMON-MODE
25mV MAX
+
V2P
V2N
V2
+
V
CM
AGND
Figure 6. Maximum Signal Levels, Channel V2
Channel V2 is usually driven from a common-mode voltage,
i.e., the differential voltage signal on the input is referenced to a
common mode (usually AGND). The analog inputs of the
ADE7757 can be driven with common-mode voltages of up to
25 mV with respect to AGND. However, best results are achieved
using a common mode equal to AGND.
REV. A–10–
ADE7757
Typical Connection Diagrams
Figure 7 shows a typical connection diagram for Channel V1. A
shunt is the current sensor selected for this example because of
its low cost compared to other current sensors such as the CT
(current transformer). This IC is ideal for low current meters.
V1P
V1N
C
F
C
F
R
F
R
F
30mV
SHUNT
AGND
PHASE NEUTRAL
Figure 7. Typical Connection for Channel V1
Figure 8 shows a typical connection for Channel V2. Typically,
the ADE7757 is biased around the phase wire, and a resistor
divider is used to provide a voltage signal that is proportional to
the line voltage. Adjusting the ratio of R
A
, R
B
, and R
F
is also a
convenient way of carrying out a gain calibration on a meter.
V2P
V2N
C
F
PHASENEUTRAL
R
F
165mV
C
F
R
F
R
B
R
A
*
*R
A
>> R
B
+ R
F
Figure 8. Typical Connections for Channel V2
POWER SUPPLY MONITOR
The ADE7757 contains an on-chip power supply monitor. The
power supply (V
DD
) is continuously monitored by the ADE7757.
If the supply is less than 4 V, the ADE7757 becomes inactive.
This is useful to ensure proper device operation at power-up
and power-down. The power supply monitor has built in hyster-
esis and filtering that provide a high degree of immunity to false
triggering from noisy supplies.
As can be seen from Figure 9, the trigger level is nominally set
at 4 V. The tolerance on this trigger level is within ± 5%. The
power supply and decoupling for the part should be such that
the ripple at V
DD
does not exceed 5 V ± 5% as specified for
normal operation.
V
DD
5V
4V
0V
TIME
INACTIVE ACTIVE INACTIVE
INTERNAL
ACTIVATION
Figure 9. On-Chip Power Supply Monitor
HPF and Offset Effects
Figure 10 illustrates the effect of offsets on the real power calcu-
lation. As can be seen, offsets on Channel V1 and Channel V2
will contribute a dc component after multiplication. Since this
dc component is extracted by the LPF and used to generate the
real power information, the offsets will contribute a constant
error to the real power calculation. This problem is easily avoided
by the built-in HPF in Channel V1. By removing the offsets
from at least one channel, no error component can be generated
at dc by the multiplication. Error terms at the line frequency ()
are removed by the LPF and the digital-to-frequency conversion
(see Digital-to-Frequency Conversion section).
The equation below shows how the power calculation is affected
by the dc offsets in the current and voltage channels.
VtVItI
VI
VIVI tIV t
VI
t
OS OS
OS OS OS OS
cos cos
cos cos
cos
ωω
ωω
ω
()
+
{}
×
()
+
{}
=
×
()
()
+
×
×
()
2
2
2
DC COMPONENT (INCLUDING ERROR TERM)
IS EXTRACTED BY THE LPF FOR REAL
POWER CALCULATION
I
OS
V
V
OS
I
V
OS
I
OS
V I
2
0
FREQUENCY – RAD/s
Figure 10. Effect of Channel Offset on the Real
Power Calculation
REV. A
ADE7757
–11–
The HPF in Channel V1 has an associated phase response that
is compensated for on-chip. Figures 11 and 12 show the phase
error between channels with the compensation network acti-
vated. The ADE7757 is phase compensated up to 1 kHz as
shown. This will ensure correct active harmonic power calcula-
tion even at low power factors.
FREQUENCY – Hz
0.30
PHASE – Degrees
0.25
0.20
0.15
0.10
0.05
0
–0.05
–0.10
0 100 200 300 400 500 600 700 800 900 1000
Figure 11. Phase Error between Channels (0 Hz to 1 kHz)
FREQUENCY – Hz
0.30
PHASE – Degrees
0.25
0.20
0.15
0.10
0.05
0
–0.05
–0.10
40 45 50 55 60 65 70
Figure 12. Phase Error between Channels (40 Hz to 70 Hz)
Digital-to-Frequency Conversion
As previously described, the digital output of the low-pass filter
after multiplication contains the real power information. However,
since this LPF is not an ideal “brick wall” filter implementation,
the output signal also contains attenuated components at the
line frequency and its harmonics, i.e., cos(ht) where h = 1, 2,
3, . . . and so on.
The magnitude response of the filter is given by
|H f
()
=
+
|
.
1
1
445
2
2
f
(5)
For a line frequency of 50 Hz, this would give an attenuation
of the 2 (100 Hz) component of approximately 22 dB. The
dominating harmonic will be at twice the line frequency (2)
due to the instantaneous power calculation.
Figure 13 shows the instantaneous real power signal at the output
of the LPF that still contains a significant amount of instanta-
neous power information, i.e., cos(2t). This signal is then passed
to the digital-to-frequency converter where it is integrated
(accumulated) over time in order to produce an output frequency.
The accumulation of the signal will suppress or average out any
non-dc components in the instantaneous real power signal. The
average value of a sinusoidal signal is zero. Thus, the frequency
generated by the ADE7757 is proportional to the average real
power. Figure 13 shows the digital-to-frequency conversion for
steady load conditions, i.e., constant voltage and current.
LPF
F1
F2
DIGITAL-TO-
FREQUENCY
CF
DIGITAL-TO-
FREQUENCY
MULTIPLIER
F1
TIME
CF
TIME
FREQUENCY FREQUENCY
V
I
0
FREQUENCY (RAD/s)
2
COS (2)
ATTENUATED BY LPF
VI
2
LPF TO EXTRACT
REAL POWER
(DC TERM)
INSTANTANEOUS REAL POWER SIGNAL
(FREQUENCY DOMAIN)
Figure 13. Real Power-to-Frequency Conversion
As can be seen in the diagram, the frequency output CF is seen
to vary over time, even under steady load conditions. This fre-
quency variation is primarily due to the cos(2t) component in
the instantaneous real power signal. The output frequency on
CF can be up to 2048 times higher than the frequency on F1
and F2. This higher output frequency is generated by accumu-
lating the instantaneous real power signal over a much shorter
time while converting it to a frequency. This shorter accumula-
tion period means less averaging of the cos(2t) component.
Consequently, some of this instantaneous power signal passes
through the digital-to-frequency conversion. This will not be a
problem in the application. Where CF is used for calibration
purposes, the frequency should be averaged by the frequency
counter, which will remove any ripple. If CF is being used to
measure energy, for example in a microprocessor based applica-
tion, the CF output should also be averaged to calculate power.
Because the outputs F1 and F2 operate at a much lower fre-
quency, a lot more averaging of the instantaneous real power
signal is carried out. The result is a greatly attenuated sinusoidal
content and a virtually ripple-free frequency output.

ADE7757ARNZRL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Data Acquisition ADCs/DACs - Specialized Energy Meter IC w/ Intg Oscillator
Lifecycle:
New from this manufacturer.
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