Not Recommended For New Design
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 5
Copyright © 2000
Rev. 1.2a, 2005-01-27
WWW.Microsemi .COM
LX1686
Di
ital Dimmin
CCFL Controller IC
INTEGRATED PRODUCTS
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature -0°C
≤
T
A
≤
85°C for the
LX1686CPW and -40°C
≤
T
A
≤
85°C for the LX1686IPW except where otherwise noted. Test conditions: VDD = VDD_P = 3.0 to
5.5V, Ri = 40kΩ, C
VCO
= 0.01µF, C
AFD
= 0.22µF, C
TRI
= 0.83µF, C
RAMP
= 208pF, R
RAMP
= 15kΩ, C
PD
= 0.22µF, C
PDB
= 0.047µF, R
PD
=
110kΩ
LX1686
Parameter Symbol Test Conditions
Min Typ Max
Units
`
DIGITAL DIMMING BLOCK (CONTINUED)
BRITE-to-ICOMP Propagation Delay T
D_BRITE
300 ns
BRITE_POS Logic Threshold VDD/2 V
DIG-DIM Logic Threshold VDD/2 V
`
DIRECT DRIVE PWM BLOCK
ISNS Threshold Voltage Range V
R_ISNS
DIG_DIM = VDD 0 2.5 V
VAMP Transconductance G
M_VAMP
VCOMP = 1.25V 400 µmho
VAMP Output Source Current I
S_VAMP
VCOMP = 1.5V 10 50 110 µA
VAMP Output Sink Current I
SK_VAMP
VCOMP = 1.5V 15 70 120 µA
VAMP Output Voltage Range V
R_VAMP
0 VDD V
VSNS Threshold Voltage V
TH_VSNS
VCOMP = VSNS 1.12 1.25 1.38 V
VCOMP Discharge Current I
D_VCOMP
VCOMP = 0.5V, VDD = 3V 0.8 1.5 10 mA
IAMP Transconductance G
M_IAMP
BRITE = 0.5 – 2.6V 70 200 700 µmho
IAMP Output Source Current I
S_IAMP
ICOMP = 1.5V, VDD = 3V -15 -40 -80 µA
IAMP Output Sink Current I
SK_IAMP
ICOMP = 1.5V, VDD = 3V 20 60 100 µA
IAMP Output Voltage Range V
R_IAMP
0 VDD V
VCMP Input Offset Voltage V
OS_VCMP
VCOMP = 1.25V, VDD = 3V -10 3 10 mV
VCOMP-to-Output Propagation Delay T
D_VCOMP
VDD = 3V 250 500 ns
ICMP Input Offset Voltage V
OS_ICMP
ICOMP = 0.5 to 2.25V, VDD = 3V -10 3 10 mV
ICOMP-to-Output Propagation Delay T
D_ICOMP
BRITE = 1.25V, RAMP_C = 2V, VDD = 3V 1100 ns
`
OUTPUT BUFFER BLOCK
Output Sink Current I
SK_OUTBUF
AOUT, BOUT = VDD = 3V 25 45 85 mA
AOUT, BOUT = 1V, VDD = 3V 20 35 85 mA
Output Source Current I
SOUT_BUF
AOUT, BOUT = 0V, VDD = 3V -35 -50 85 mA
AOUT, BOUT = 2V, VDD = 3V -20 -40 85 mA
`
BIAS CONTROL BLOCK
Voltage at Pin I_R V
IR
.975 1.02 V
Pin I_R Maximum Source Current I
MAX_IR
Design Reference Only 50 µA
VBG Output Resistance R
O_VBG
Design Reference Only 10
kΩ
ENABLE Logic Threshold – 3V V
EN3V
VDD = 3V 1.5 1.9 2.4 V
ENABLE Logic Threshold – 5.5V V
EN5.5
VDD = 5.5V 2.7 3.2 3.6 V
ENABLE Threshold Hysteresis – 3V V
H_EN3
450 mV
ENABLE Threshold Hysteresis – 5.5V V
H_EN5.5
350 mV
E
E
L
L
E
E
C
C
T
T
R
R
I
I
C
C
A
A
L
L
S
S
