Typical Application/Operation
Introduction to Fault Detection and Protection
The power stage of a typical three-phase inverter is sus-
ceptible to several types of failures, most of which are
potentially destructive to the power IGBTs. These failure
modes can be grouped into four basic categories: phase
or rail supply short circuits due to user misconnect or bad
wiring; control signal failures due to noise or computa-
tional errors; overload conditions induced by the load; and
component failures in the gate drive circuitry. Under any of
these fault conditions, the current through the IGBTs can
increase rapidly, causing excessive power dissipation and
heating. The IGBTs become damaged when the current
load approaches the saturation current of the device, and
the collector-to-emitter voltage rises above the saturation
voltage level. The drastically increased power dissipation
very quickly overheats the power device and destroys it.
To prevent damage to the drive, fault protection must be
implemented to reduce or turn o the overcurrent during
a fault condition.
A circuit providing fast local fault detection and shutdown
is an ideal solution, but the number of required compo-
nents, board space consumed, cost, and complexity have
until now limited its use to high performance drives. The
features that this circuit must have are high speed, low
cost, low resolution, low power dissipation, and small size.
The ACPL-32JT satises these criteria by combining a high
speed, high output current driver, high voltage optical
isolation between the input and output, local IGBT de-
saturation detection and shutdown, and optically isolated
fault and UVLO status feedback signal into a single 16-pin
surface mount package.
The fault detection method, which the ACPL-32JT has
adopted, is to monitor the saturation (collector) voltage of
the IGBT and to trigger a local fault shutdown sequence if
the collector voltage exceeds a predetermined threshold.
A small gate discharge device slowly reduces the high
short circuit IGBT current to prevent damaging voltage
spikes. Before the dissipated energy can reach destructive
levels, the IGBT is shut o. During the o-state of the IGBT,
the fault detect circuitry is simply disabled to prevent false
‘fault’ signals.
The alternative protection scheme of measuring IGBT
current to prevent desaturation is eective if the short
circuit capability of the power device is known, but this
method will fail if the gate drive voltage decreases enough
to only partially turn on the IGBT. By directly measuring
the collector voltage, the ACPL-32JT limits the power
dissipation in the IGBT, even with insucient gate drive
voltage. Another more subtle advantage of the desatu-
ration detection method is that power dissipation in the
IGBT is monitored, while the current sense method relies
on a preset current threshold to predict the safe limit of
operation. Therefore, an overly- conservative overcurrent
threshold is not needed to protect the IGBT.
Recommended Application Circuit
The ACPL-32JT has non-inverting gate control inputs, an
open collector fault, and UVLO outputs suitable for wired
‘OR’ applications.
The recommended application circuit shown in Figure 3
illustrates a typical gate drive implementation using the
ACPL-32JT.
The two supply bypass capacitors (1.0 mF or larger)
provide the large transient currents necessary during a
switching transition. The Desat diode and 220 pF blanking
capacitor are the necessary external components for the
fault detection circuitry. The gate resistor (10 Ω) serves to
limit gate charge current and indirectly controls the IGBT
collector voltage rise and fall times. The open collector
fault and UVLO outputs have a passive 10 kΩ pull-up
resistor and a 330 pF ltering capacitor.
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