MARCH 9, 2017 7 5-OUTPUT 1.5V PCIE GEN1-2-3 FANOUT BUFFER
9DBU0531 DATASHEET
Electrical Characteristics–DIF Low-Power HCSL Outputs
Electrical Characteristics–Current Consumption
TA = T
AMB
; Supply voltages per normal operation conditions; see Test Loads for loading conditions
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
dV/dt Scope averaging on, fast setting 1.4 2.3 3.5
V/ns
1,2,3
dV/dt Scope averaging on, slow setting 0.9 1.5 2.5
1,2,3
Δ
dV/dt Slew rate matching, scope averaging on 9.3 20
%
1,2,4
Voltage High V
HIGH
630 750 850 7
Voltage Low V
LOW
-150 26 150 7
Max Voltage Vmax 763 1150 7
Min Voltage Vmin -300 22 7
Vswing Vswing Scope averaging off 300 1448 mV 1,2
Crossing Voltage (abs) Vcross_abs Scope averaging off 250 390 550 mV 1,5
Crossing Voltage (var)
Δ
-Vcross Scope averaging off 11 140 mV 1,6
2
Measured from differential waveform
mV
7
At default SMBus settings.
1
Guaranteed by design and characterization, not 100% tested in production.
3
Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around
differential 0V.
4
Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on
the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the
oscilloscope is to use for the edge rate calculations.
5
Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising
edge (i.e. Clock rising and Clock# falling).
6
The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross
absolute) allowed. The intent is to limit Vcross induced modulation by setting
Δ
-Vcross to be smaller than Vcross absolute.
Slew Rate
Statistical measurement on single-ended signal
using oscilloscope math function. (Scope
averaging on)
mV
Measurement on single ended signal using
absolute value. (Scope averaging off)
TA = T
AMB
; Supply voltages per normal operation conditions; see Test Loads for loading conditions
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
I
DDR
VDDR at 100MHz
1.84 3 mA
I
DDDIG
VDDIG, all outputs at 100MHz
0.09 0.5 mA
I
DDAO
VDDO1.5+VDDO, all outputs at 100MHz
21 25 mA
I
DDRPD
VDDR, CKPWRGD_PD# = 0 0.001 0.3 mA
2
I
DDDIGPD
VDDDIG, CKPWRGD_PD# = 0 0.1 0.2 mA
2
I
DDAOPD
VDDO1.5+VDDO, CKPWRGD_PD# = 0 0.4 1 mA
2
1
Guaranteed by design and characterization, not 100% tested in production.
2
Input clock stopped.
Operating Supply Current
Powerdown Current