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SY100EP111UTG-TX

P1-P3P4-P6P7-P9
1
Precision Edge
®
SY100EP111U
Micrel, Inc.
M9999-021511
hbwhelp@micrel.com or (408) 955-1690
BLOCK DIAGRAM
0
1
CLK0
/CLK0
CLK_SEL
Q
0
/Q
0
Q
1
/Q
1
Q
2
/Q
2
Q
3
/Q
3
Q
4
/Q
4
Q
5
/Q
5
Q
6
/Q
6
Q
7
/Q
7
Q
8
/Q
8
Q
9
/Q
9
V
BB
V
CC
V
EE
CLK1
/CLK1
V
CC
V
EE
V
EE
V
EE
V
EE
75kΩ
75kΩ 75kΩ
75kΩ
75kΩ 75kΩ
75kΩ
FEATURES
■ 2.5V and 3.3V power supply options
■ Guaranteed AC parameters over temperature:
•f
MAX
= 3GHz
•<25ps output-to-output skew
•<250ps t
r
/t
f
•<400ps propagation delay
■ Wide temperature range: –40°C to +85°C
■ Differential design
■ V
BB
output for single-ended input applications
■ Fully compatible with industry standard 100K I/O
levels
■ Available in 32-pin TQFP package
The SY100EP111U is a high-speed, low skew 1-to-10
differential fanout buffer designed for clock distribution in
new, high-performance systems. The internal 2:1 mux
allows the input to select between two differential clock
sources.
The device is specifically designed for low skew. The
interconnect scheme and metal layout are carefully
optimized for minimal gate-to-gate skew within the device.
Wafer characterization and process control ensure
consistent distribution of propagation delay from lot to lot.
The V
BB
output is intended for use as a reference
voltage for single-ended reception of ECL signals to that
device only. When using V
BB
for this purpose, it is
recommended that V
BB
is decoupled to V
CC
via a 0.01µF
capacitor.
2.5V/3.3V 1:10 DIFFERENTIAL
LVPECL/LVECL/HSTL CLOCK DRIVER
DESCRIPTION
Precision Edge
®
SY100EP111U
Rev.: F Amendment: /0
Issue Date: December 2005
Precision Edge is a registered trademark of Micrel, Inc.
Precision Edge
®
2
Precision Edge
®
SY100EP111U
Micrel, Inc.
M9999-021511
hbwhelp@micrel.com or (408) 955-1690
PACKAGE/ORDERING INFORMATION
Ordering Information
(1)
Package Operating Package Lead
Part Number Type Range Marking Finish
SY100EP111UTI T32-1 Industrial 100EP111UTI Sn-Pb
SY100EP111UTITR
(2)
T32-1 Industrial 100EP111UTI Sn-Pb
SY100EP111UTG
(3)
T32-1 Industrial 100EP111UTG with Pb-Free
Pb-Free bar-line indicator NiPdAu
SY100EP111UTGTR
(2, 3)
T32-1 Industrial 100EP111UTG with Pb-Free
Pb-Free bar-line indicator NiPdAu
SY100EP111UTGTX
(2, 4)
T32-1 Industrial 100EP111UTG with Pb-Free
Pb-Free bar-line indicator NiPdAu
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
4. EIA specification orientation.
32 31 30 29 28 27 26 25
910111213 141516
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
VCC
CLK_SEL
CLK0
/CLK0
VBB
CLK1
/CLK1
VEE
Q3
/Q3
Q4
/Q4
Q5
/Q5
Q6
/Q6
VCC
Q0
/Q0
Q1
/Q1
Q2
/Q2
VCC
VCC
/Q9
Q9
/Q8
Q8
/Q7
Top View
TQFP
T32-1
Q7
VCC
32-Pin TQFP (T32-1)
Pin Function
CLK0, /CLK0 LVPECL, LVECL, HSTL Clock Inputs:
CLK0 input includes a 75kΩ pull-down. Default
is low if left floating. /CLK0 includes an internal
75kΩ pull-up and pull-down. Default state is
V
CC
/2.
CLK1, /CLK1 LVPECL, LVECL, HSTL Clock Inputs:
CLK input includes a 75kΩ pull-down. Default
is low if left floating. /CLK includes an internal
75kΩ pull-up and pull-down. Default state is
V
CC
/2.
Q0 to Q9 LVPECL/LVECL Outputs.
/Q0 to /Q9 Complementary LVPECL/LVECL Outputs.
CLK_SEL LVPECL/LVECL Clock Select Input: Internal
75kΩ resistor connected to V
EE
. When left
floating, the default condition is LOW.
V
BB
Reference Voltage: AC coupled or single-
ended input applications.
V
CC
Positive Power Supply: Bypass with 0.1µF//
0.01µF low ESR capacitors.
V
EE
Negative Power Supply: LVPECL operation,
connect to GND.
PIN NAMES
CLK_SEL Active Input
0 CLK0, /CLK0
1 CLK1, /CLK1
FUNCTION TABLE
3
Precision Edge
®
SY100EP111U
Micrel, Inc.
M9999-021511
hbwhelp@micrel.com or (408) 955-1690
Symbol Rating Value Unit
V
CC
–V
EE
Power Supply Voltage 6.0 V
V
IN
Input Voltage (V
CC
= 0V, V
IN
not more negative than V
EE
) –6.0 to 0 V
Input Voltage (V
EE
= 0V, V
IN
not more positive than V
CC
) +6.0 to 0
I
OUT
Output Current –Continuous 50 mA
–Surge 100
I
BB
V
BB
Sink/Source Current
(2)
±0.5 mA
T
LEAD
Lead Temperature (soldering, 20sec.) +260 °C
T
A
Operating Temperature Range –40 to +85 °C
T
store
Storage Temperature Range –65 to +150 °C
θ
JA
Package Thermal Resistance –Still-Air 50 °C/W
(Junction-to-Ambient) –500lfpm 42
θ
JC
Package Thermal Resistance 20 °C/W
(Junction-to-Case)
Note 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions
for extended periods may affect device reliability.
Note 2. Due to the limited drive capability, use for inputs of same package only.
ABSOLUTE MAXIMUM RATINGS
(1)
T
A
= –40°CT
A
= +25°CT
A
= +85°C
Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition
V
CC
Power Supply Voltage
(LVPECL) 2.375 — 3.8 2.375 — 3.8 2.375 — 3.8 V
(LVECL) –3.8 — –2.375 –3.8 — –2.375 –3.8 — –2.375 V
I
EE
Power Supply Current — 55 120 — 70 120 — 85 120 mA
I
IH
Input HIGH Current — — 150 — — 150 — — 150 µAV
IN
=V
IH
I
IL
Input LOW Current
CLK0, CLK1 0.5 — — 0.5 — — 0.5 — — µAV
IN
=V
IL
/CLK0, /CLK1 –150 — — –150 — — –150 — — µAV
IN
=V
IL
C
IN
Input Capacitance ———— 2 ————pF
Note 1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.
DC ELECTRICAL CHARACTERISTICS
(1)
P1-P3P4-P6P7-P9

SY100EP111UTG-TX

Mfr. #:
Buy SY100EP111UTG-TX
Manufacturer:
Microchip Technology
Description:
Buffers & Line Drivers 2.5-5V 1:10 PECL Fanout Buffer
Lifecycle:
New from this manufacturer.
Delivery:
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