IS31FL3730
Integrated Silicon Solution, Inc. – www.issi.com 10
Rev.A, 12/19/2011
APPLICATION INFORMATION
GENERAL PURPOSE DOT MATRIX DISPLAY MODE
The general purpose dot matrix display timing diagram
is shown in Figure 10. IS31FL3730 may be configured
to drive displays of different dimensions from 8×8 to
5×11. Furthermore, IS31FL3730 may be configured to
drive one or two LED matrices of the same dimension.
Therefore, the overall row and column scan time can
vary based on the final LED matrix configuration.
In any LED matrix configuration, a single line (column or
row) of LEDs is illuminated for 32µs before IS31FL3730
moves on to the next line of LEDs (Figure 10).
Example 1: When the IS31FL3730 is configured in the
general purpose dual 8×8 dot matrix display mode,
column controls C8:C1 scans the eight columns of
Matrix 1 then row controls R8:R1 scans the eight rows
of Matrix 2 at a rate of 1.89kHz, or 528µs per frame.
Each line is active for 32µs. The non-overlap interval
between adjacent lines is 1µs.
Example 2: When configured to drive a single 7×9 dot
matrix display (Matrix 1), the column controls C9:C1
scan the nine columns every 297µs. Also note that in
this case, the Data Registers’ MSB will be ignored.
Figure 10 Dot Matrix Display Timing Diagram
DUAL 8×8 DOT MATRIX DISPLAY MODE
The application example in Figure 1 shows the
IS31FL3730 in the dual 8×8 LED dot matrix display
mode.
The Matrix 1 LED columns have common cathodes and
are connected to the C1:C8 outputs. The rows are
connected to the row drivers. The Matrix 2 LED rows
have common cathodes and connected to the R1:R8.
The columns are connected to the C1:C8. Each of the
128 LEDs can be addressed separately.
DUAL 5×11 DOT MATRIX DISPLAY MODE
By setting the ADM bits of the Configuration Register
(00h) to “11” and the DM bits to “11”, the IS31FL3730
will operate in the dual 5×11 LED dot matrix display
mode.
The Matrix 1 LED columns have common cathodes
and are connected to the C1:C11 outputs. The rows
are connected to the row drivers. The Matrix 2 LED
rows have common cathodes and are connected to the
R1:R5 outputs. The columns are connected to the
column drivers. Each of the 110 LEDs can be
addressed separately. The three MSBs (D7:D5) of
each Data Register (01h~0Bh, 0Eh~18h) are ignored.
DOT MATRIX DISPLAY MODE WITH AUDIO
MODULATION
When the IS31FL3730 operates in any of the dot
matrix modes, if the bit A_EN in Configuration Register
(00h) is set to “1”, the brightness of LED image can be
modulated by audio signal not controlled by the CS bit
in Lighting Effect Register (0Dh).
An external capacitor, C_FILT is required to control the
rate at which the display intensity will change. The rate
of change is computed using the formula: ∆T =
C×500kΩ. A value of 0.1µF provides a good effect by
allowing the display to fade from full intensity to off in
approximately 50ms. Smaller capacitance will cause
the intensity to change more quickly, and, conversely, a
larger capacitance will cause the display intensity to
change at a slower rate.
SHUTDOWN MODE
Shutdown mode can either be used as a means of
reducing power consumption or generating a flashing
display (repeatedly entering and leaving shutdown
mode). During shutdown mode all registers retain their
data.
SOFTWARE SHUTDOWN
By setting SSD bit of the Configuration Register (00h)
to “1”, the IS31FL3730 will operate in software
shutdown mode, wherein they consume only 1.7μA
(Typ.) current. When the IS31FL3730 is in software
shutdown mode, all current sources and digital drivers
are switched off, so that the matrix is blanked.
HARDWARE SHUTDOWN
The chip enters hardware shutdown mode when the
SDB pin is pulled low.
