LT3668
10
3668fa
For more information www.linear.com/LT3668
PIN FUNCTIONS
SW (Pin 1): The SW pin is the output of the internal power
switch. Connect this pin to the inductor, the catch diode
and the boost capacitor.
BOOST (Pin 2): This pin is used to provide a drive volt
-
age, higher than the input voltage, to the internal bipolar
NPN
power switch of the switching regulator. Connect
a capacitor (typically 0.22μF) between BOOST and SW.
EN (Pin 3): The EN pin is used to put the LT3668 in shut
-
down mode. Ti
e to ground to shut down the LT3668. Tie
to 1V or more for normal operation. If the EN pin is to be
pulled below ground, use a series resistor to limit the pin
current to 1mA.
RT (Pin 4): Oscillator Resistor Input. Connect a resistor
from this pin to ground to set the switching frequency.
OUT3 (Pin 6), OUT2 (Pin 10): These are the outputs of
the two LDOs. Stability requirements demand a minimum
10μF ceramic output capacitor to prevent oscillations.
ADJ3 (Pin 9), ADJ2 (Pin 7): The two LDOs of the LT3668
regulate their outputs to follow the voltages at the ADJ2
and ADJ3 pins. Connect the reference voltage to these pins.
FB1 (Pin 8): The switching regulator
of the LT3668 regu-
lates the FB1 pin to 1.2V. Connect the feedback resistor
divider tap to this pin.
IN
2 (Pin 11), IN3/BD (Pin 5): These pins are the inputs
of the two LDOs. IN3/BD also connects to the anode of
the internal boost diode and also supplies current to the
LT3668’s internal regulator when IN3/BD is above 3.2V.
EN2/ILIM2 (Pin 12), EN3/ILIM3 (Pin 13): Precision cur
-
rent limit programming pins. They connect to collectors
of current mirror PNPs which are 1/799th the size of the
output
power PNPs of the two LDOs. These pins are also
the inputs to the current limit amplifiers. Current limit
thresholds are set by connecting resistors between the
EN2/ILIM2 pin and GND and between the EN3/ILIM3 pin
and GND. Stability requirements demand 47nF capacitors in
parallel to these resistors. For detailed information on how
to set the pin resistor values, see the Operation section. If
any of these pins is not used, tie it to GND. To disable an
LDO, pull its EN/ILIM pin above 1.2V. If an EN/ILIM pin
is used as a digital input for enable/disable, ensure rise
and fall times of less than
1µs.
PG (Pin 14): The PG pin is the open-drain output of an
internal window comparator. PG remains low until the
FB1 pin is within ±10% of its final regulation voltage. PG
output is valid when V
IN1
or V
IN2
are above the minimum
input voltage and EN is high.
IN1 (Pin 15): The IN1 pin supplies current to the internal
regulator and to the internal power switch. This pin must
be locally bypassed.
DA (Pin 16): Connect the anode of the catch diode (D1
in Block Diagram) to this pin. Internal circuitry senses
the current through the catch diode providing frequency
foldback in overload conditions.
GND (Exposed Pad Pin 17): This is the ground of all internal
circuitry, as well as the power ground used by the catch
diode (D1). The exposed pad must be soldered to the PCB.
LT3668
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3668fa
For more information www.linear.com/LT3668
BLOCK DIAGRAM
ERROR
AMPLIFIER
OUT3
EN3/
ILIM3
1V
0.4V 0.4V
80Ω
80Ω
1V
LDO
DISABLE
LDO
DISABLE
OUT2
PG
IN2 ADJ2 ADJ3
V
OUT2
C4
V
IN1
C1
C5
V
OUT3
ERROR
AMPLIFIER
CURRENT LIMIT
AMPLIFIER
CURRENT LIMIT
AMPLIFIER
+
LDO
DRIVER
+
ERROR
AMPLIFIER
+
+
10
9 7
IN3/
BD
511
EN2/
ILIM2
12
14
6
B00ST
2
SW
3668 BD
1
DA
16
13
+
+
+
LDO
DRIVER
INTERNAL REF
SLOPE COMP
Burst Mode
DETECT
OSCILLATOR
250kHz TO 2.2MHz
1.2V
IN1
15
EN
1.32V
VC
R
T
4
RT
1.08V
+
+
3
R
S
Q
BOOST
DIODE
CATCH DIODE
CURRENT LIMIT
C2
V
OUT1
C3
L1
D1
+
8
FB1
R2 R1
17
GND
LT3668
12
3668fa
For more information www.linear.com/LT3668
OPERATION
The LT3668 combines a 400mA buck switching regulator
and two 200mA low dropout linear tracking regulators.
Operation is best understood by referring to the Block
Diagram.
The buck regulator part is a constant frequency, current
mode step-down regulator. An oscillator, with frequency
set by R
T
, sets an RS flip-flop, turning on the internal
power switch. An amplifier and comparator monitor the
current flowing between the IN1 and SW pins, turning the
switch off when this current reaches a level determined by
the voltage at VC. An error amplifier measures the output
voltage through an external resistor divider tied to the
FB1 pin and servos the VC node. If the error amplifier’s
output increases, more current is delivered to the output;
if it decreases, less current is delivered.
Another comparator monitors the current flowing through
the catch diode and reduces the operating frequency when
the current exceeds the 500mA bottom current limit. This
foldback in frequency helps to control the output current
in fault conditions such as a shorted output with high
input voltage. Maximum deliverable current to the output
is therefore limited by both switch current limit and catch
diode current limit.
An internal regulator
provides power to the control cir-
cuitr
y. The bias regulator normally draws power from the
IN1
pin, but if the IN3/BD pin is connected to an external
voltage higher than 3.2V, bias power will be drawn from
the external source (typically the regulated output voltage).
This improves efficiency.
The switch driver operates from either IN1 or from the
BOOST pin. An external capacitor is used to generate a
voltage at the BOOST pin that is higher than the input
supply. This allows the driver to fully saturate the internal
NPN power switch for efficient operation.
To further optimize efficiency, the LT3668 automatically
switches to Burst Mode operation in light load situations.
Between bursts, all circuitry associated with controlling
the output switch is shut down, reducing the input sup
-
ply current to 50μA (including the current drawn by
the LDOs).
The
switching regulator has an overvoltage protection
feature which disables switching action when IN1 goes
above 42V (typical) during transients. It can then safely
sustain transient input voltages up to 60V.
The LDO blocks are micropower, low noise 200mA linear
tracking regulators with low dropout voltage and current
limit, which provide fast transient response with minimum
low ESR 10μF
ceramic output capacitors. The output volt-
age
of each LDO follows a reference voltage applied to its
adjust
input with high accuracy. Each output current limit
can be programmed individually with a single resistor, and
pulling the EN2/ILIM2 or EN3/ILIM3 pin high shuts down the
corresponding LDO. Internal protection circuitry includes
reverse-battery protection, reverse output protection,
reverse-current protection and current limit with foldback.
The internal reference voltage circuitry is supplied by
the IN1 and IN2 pins. This allows the LDO at IN2 to run
independently and supply the switching regulator with its
output OUT2.
The EN pin is used to place the LT3668 in shutdown,
thereby reducing the input current to less than 1μA.
The LT3668 contains a power good window comparator
that indicates whether the output voltage of the switching
regulator is within ±10% of its nominal value. The output
PG of this comparator is an open-drain transistor which
is off when the output is in regulation, allowing external
resistors to pull the PG pin high. Power good is valid if
the LT3668 is enabled and IN1 or IN2 are above their
minimum input voltages.
Internal thermal limiting protects the LT3668 during
overload
conditions.

LT3668EMSE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 40V 400mA Step-Down Switching Regulator with Dual Fault Protected Tracking LDOs
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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