TC75S51F/FU/FE
2014-03-01
1
TOSHIBA CMOS Linear Integrated Circuit Silicon Monolithic
TC75S51F, TC75S51FU, TC75S51FE
Single Operational Amplifier
The TC75S51F/TC75S51FU/TC75S51FE is a CMOS single-
operation amplifier which incorporates a phase compensation
circuit. It is designed with a low-voltage and low-current power
supply; this differentiates this device from general-purpose
bipolar op-amps.
Features
Low-voltage operation : V
DD
= ±0.75 to ±3.5 V or 1.5 to 7 V
Low-current power supply : I
DD
(V
DD
= 3 V) = 60 μA (typ.)
Built-in phase-compensated op-amp, obviating the need for
any external device
Ultra-compact package
Absolute Maximum Ratings
(Ta
=
25°C)
Characteristics Symbol Rating Unit
Supply voltage V
DD
, V
SS
7 V
Differential input voltage DV
IN
±7 V
Input voltage V
IN
V
DD
to V
SS
V
TC75S51F/FU 200
Power
dissipation
TC75S51FE
P
D
100
mW
Operating temperature T
opr
40
to 85 °C
Storage temperature T
stg
55
to 125 °C
Note: Using continuously under heavy loads (e.g. the application
of high temperature/current/voltage and the significant
change in temperature, etc.) may cause this product to
decrease in the reliability significantly even if the operating conditions (i.e. operating
temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
TC75S51F
TC75S51FU
TC75S51FE
Weight
SSOP5-P-0.95 : 0.014 g (typ.)
SSOP5-P-0.65A : 0.006 g (typ.)
SON5-P-0.50 : 0.003 g (typ.)
SON5-P-0.50
(SMV)
(USV)
(ESV)
Start of commercial production
1993-07
TC75S51F/FU/FE
2014-03-01
2
Marking
(top view)
Pin
Connection
(top view)
Electrical Characteristics
DC Characteristics
(V
DD
=
3.0 V, V
SS
=
GND, Ta
=
25°C)
Characteristics Symbol
Test
Circuit
Test Condition Min Typ. Max Unit
Input offset voltage V
IO
1 R
S
= 1 kΩ, R
F
= 100 kΩ 2 10 mV
Input offset current I
IO
1 pA
Input bias current I
I
1 pA
Common mode input voltage CMV
IN
2 R
S
= 1 kΩ, R
F
= 100 kΩ 0 2.5 V
Voltage gain (open loop) G
V
60 70 dB
V
OH
3 R
L
100 kΩ 2.9
Maximum output voltage
V
OL
4 R
L
100 kΩ 0.1
V
Common mode input signal
rejection ratio
CMRR 2 V
IN
= 0.0 to 2.5 V 55 65 dB
Supply voltage rejection ratio SVRR 1 V
DD
= 1.5 to 7.0 V 60 70 dB
Supply current I
DD
5 60 200 μA
DC Characteristics
(V
DD
=
1.5 V, V
SS
=
GND, Ta
=
25°C)
Characteristics Symbol
Test
Circuit
Test Condition Min Typ. Max Unit
Input offset voltage V
IO
1 R
S
= 10 kΩ, R
F
= 100 kΩ 2 10 mV
Input offset current I
IO
1 pA
Input bias current I
I
1 pA
Common mode input voltage CMV
IN
2 R
S
= 10 kΩ, R
F
= 100 kΩ 0 1.0 V
Voltage gain (open loop) G
V
60 70 dB
V
OH
3 R
L
100 kΩ 1.4
Maximum output voltage
V
OL
4 R
L
100 kΩ 0.1
V
Supply current I
DD
5 50 150 μA
Note: For this device, please use a source current of no more than 70 μA.
V
DD
5
IN ()
4
1 3
V
SS
2
OUT
IN (+)
S C
4 5
3 1 2
TC75S51F/FU/FE
2014-03-01
3
AC Characteristics
(V
DD
=
3.0 V, V
SS
=
GND, Ta
=
25°C)
Characteristics Symbol
Test
Circuit
Test Condition Min Typ. Max Unit
Slew rate SR A
V
= 0 dB 0.5 V/μs
Unity gain cross frequency f
T
A
V
= 40 dB 0.6 MHz
AC Characteristics
(V
DD
=
1.5 V, V
SS
=
GND, Ta
=
25°C)
Characteristics Symbol
Test
Circuit
Test Condition Min Typ. Max Unit
Slew rate SR A
V
= 0 dB 0.3 V/μs
Unity gain cross frequency f
T
A
V
= 40 dB 0.5 MHz
Test Circuit
1. SVRR, V
IO
2. CMRR, CMV
IN
V
OUT
V
DD
R
F
R
F
R
S
R
S
V
DD
/2
V
OUT
V
DD
R
F
R
F
R
S
R
S
V
DD
/2
V
IN
SVRR
For each of the two V
DD
values, measure the V
OUT
value, as
indicated below, and calculate the value of SVRR using the
equation shown.
When V
DD
= 1.5 V, V
DD
= V
DD
1 and V
OUT
= V
OUT
1
When V
DD
= 7.0 V, V
DD
= V
DD
2 and V
OUT
= V
OUT
2
S
R
F
R
S
R
2
V
DD
1
V
DD
2
V
OUT
1
V
OUT
og 20SVRR
+
×
V
IO
Measure the value of V
OUT
and calculate the value of V
IO
using
the following equation.
S
R
F
R
S
R
2
V
DD
V
OUT
V
IO
+
×
=
CMRR
Measure the V
OUT
value, as indicated below, and calculate the
value of the CMRR using the equation shown.
When V
IN
= 0.0 V, V
IN
= V
IN
1 and V
OUT
= V
OUT
1
When V
IN
= 2.5 V, V
IN
= V
IN
2 and V
OUT
= V
OUT
2
S
R
F
R
S
R
2
V
IN
1
V
IN
2
V
OUT
1
V
OUT
og 20CMRR
+
×
CMV
IN
Input range within which the CMRR specification guarantees
V
OUT
value (as varied by the V
IN
value).

TC75S51F,LF

Mfr. #:
Manufacturer:
Toshiba
Description:
Operational Amplifiers - Op Amps CMOS Op Amp
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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