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74VHCT126BQ,115

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com (email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
- © Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and
understanding,
Kind regards,
Team Nexperia
1. General description
The 74VHC126; 74VHCT126 are high-speed Si-gate CMOS devices and are pin
compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with
JEDEC standard No. 7-A.
The 74VHC126; 74VHCT126 provide four non-inverting buffer/line drivers with 3-state
outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE).
A LOW-level at pin nOE causes the outputs to assume a high-impedance OFF-state.
The 74VHC126; 74VHCT126 are identical to the 74VHC125; 74VHCT125 but have active
HIGH output enable inputs.
2. Features
n Balanced propagation delays
n All inputs have Schmitt-trigger action
n Inputs accept voltages higher than V
CC
n Input levels:
u The 74VHC126 operates with CMOS input level
u The 74VHCT126 operates with TTL input level
n ESD protection:
u HBM JESD22-A114E exceeds 2000 V
u MM JESD22-A115-A exceeds 200 V
u CDM JESD22-C101C exceeds 1000 V
n Multiple package options
n Specified from −40 °C to +85 °C and from −40 °C to +125 °C
74VHC126; 74VHCT126
Quad buffer/line driver; 3-state
Rev. 01 — 13 August 2009 Product data sheet
74VHC_VHCT126_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 13 August 2009 2 of 15
NXP Semiconductors
74VHC126; 74VHCT126
Quad buffer/line driver; 3-state
3. Ordering information
4. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74VHC126D −40 °C to +125 °C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74VHCT126D
74VHC126PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74VHCT126PW
74VHC126BQ −40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
SOT762-1
74VHCT126BQ
Fig 1. Functional diagram
mna235
1A 1Y
2
1
3
1OE
2A 2Y
5
4
6
2OE
3A 3Y
9
10
8
3OE
4A 4Y
12
13
11
4OE
Fig 2. Logic symbol Fig 3. IEC logic symbol
mna234
nOE
nA
nY
mna236
1
EN1
1
3
2
4
6
5
10
8
9
13
11
12
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

74VHCT126BQ,115

Mfr. #:
Buy 74VHCT126BQ,115
Manufacturer:
Nexperia
Description:
Buffers & Line Drivers CMOS 4CH NON-INVERT
Lifecycle:
New from this manufacturer.
Delivery:
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