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NB7V52MMNTXG

P1-P3P4-P6P7-P9P10-P10
NB7V52M
http://onsemi.com
4
Table 4. DC CHARACTERISTICS, Multi−Level Inputs V
CC
= 1.71 V to 2.625 V, V
EE
= 0 V, T
A
= −40°C to +85°C (Note 4)
Symbol
Characteristic Min Typ Max Unit
POWER SUPPLY CURRENT
I
CC
Power Supply Current (Inputs and Outputs Open) V
CC
= 2.5 V
V
CC
= 1.8 V
90
70
110
90
mA
CML OUTPUTS
V
OH
Output HIGH Voltage (Note 5)
V
CC
= 2.5 V
V
CC
= 1.8 V
V
CC
– 30
2470
1770
V
CC
– 10
2490
1790
V
CC
2500
1800
mV
V
OL
Output LOW Voltage (Note 5) V
CC
= 2.5 V V
CC
– 650
1850
V
CC
– 500
2000
V
CC
– 400
2100
mV
V
CC
= 1.8 V V
CC
– 600
1200
V
CC
– 450
1350
V
CC
– 350
1450
DIFFERENTIAL CLOCK INPUTS DRIVEN SINGLE−ENDED (Note 6) (Figures 5 and 7)
V
th
Input Threshold Reference Voltage Range (Note 7) 1000 V
CC
− 100 mV
V
IH
Single−Ended Input HIGH Voltage V
th
+ 100 V
CC
mV
V
IL
Single−Ended Input LOW Voltage V
EE
V
th
− 100 mV
V
ISE
Single−Ended Input Voltage (V
IH
− V
IL
) 200 1200 mV
DIFFERENTIAL D/D, CLK/CLK, R/R INPUTS DRIVEN DIFFERENTIALLY (Figures 6 and 8) (Note 8)
V
IHD
Differential Input HIGH Voltage 1100 V
CC
mV
V
ILD
Differential Input LOW Voltage V
EE
V
CC
− 100 mV
V
ID
Differential Input Voltage (V
IHD
− V
ILD
) 100 1200 mV
V
CMR
Input Common Mode Range (Differential Configuration, Note 9)
(Figure 10)
1050 V
CC
− 50 mV
I
IH
Input HIGH Current (VT
x
/VT
x
Open) −250 250
mA
I
IL
Input LOW Current (VT
x
/VT
x
Open) −250 250
mA
TERMINATION RESISTORS
R
TIN
Internal Input Termination Resistor 45 50 55
W
R
TOUT
Internal Output Termination Resistor 45 50 55
W
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Input and output parameters vary 1:1 with V
CC
.
5. CML outputs loaded with 50 W to V
CC
for proper operation.
6. V
th
, V
IH
, V
IL,,
and V
ISE
parameters must be complied with simultaneously.
7. V
th
is applied to the complementary input when operating in single−ended mode.
8. V
IHD
, V
ILD,
V
ID
and V
CMR
parameters must be complied with simultaneously.
9. V
CMR
min varies 1:1 with V
EE
, V
CMR
max varies 1:1 with V
CC
. The V
CMR
range is referenced to the most positive side of the differential input
signal.
NB7V52M
http://onsemi.com
5
Table 5. AC CHARACTERISTICS V
CC
= 1.71 V to 2.625 V; V
EE
= 0 V; T
A
= −40°C to 85°C (Note 10)
Symbol
Characteristic Min Typ Max Unit
f
MAX
Maximum Input Clock Frequency 10 12 GHz
f
DATA
MAX
Maximum Input Data Rate (PRBS23) 10 12 Gbps
V
OUTPP
Output Voltage Amplitude (@ V
INPPmin
) fin ≤ 7 GHz
(See Figures 3 and 10, Note 11) fin ≤ 10 GHz
300
250
400
400
mV
t
PLH
,
t
PHL
Propagation Delay to Differential Outputs, @ 1 GHz,
Measured at Differential Cross−point
CLK/CLK to Q/Q
R/R to Q/Q
200
300
350
600
ps
t
S
Setup Time (D to CLK) 40 15 ps
t
H
Hold Time (D to CLK) 50 20 ps
t
RR
Reset Recovery 275 200 ps
t
PW
Minimum Pulse Width R/R 1 ns
t
JITTER
RJ – Output Random Jitter (Note 12) fin v 10 GHz 0.2 0.8 ps RMS
V
INPP
Input Voltage Swing (Differential Configuration) (Note 13) 100 1200 mV
t
r,
, t
f
Output Rise/Fall Times @ 1 GHz (20% − 80%), Q, Q 20 35 50 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10.Measured using a 400 mV V
INPP
source, 50% duty cycle clock source. All output loading with external 50 W to V
CC
. Input edge rates
w40 ps (20% − 80%).
11. Output voltage swing is a single−ended measurement operating in differential mode.
12.Additive RMS jitter with 50% duty cycle clock signal.
13.Input voltage swing is a single−ended measurement operating in differential mode.
Figure 3. Clock Output Voltage Amplitude
(V
OUTPP
) vs. Input Frequency (f
in
) at Ambient
Temperature (Typ)
fin, Clock Input Frequency (GHz)
OUTPUT VOLTAGE AMPLITUDE
(mV)
500
450
400
350
300
200
012 345678
Q/Q Output
Figure 4. Simplified Input Structure
250
50 W
50 W
D
V
CC
VTD
VTD
D
R
C
R
C
I
9101112
R
TIN
R
TIN
NB7V52M
http://onsemi.com
6
CLK
V
th
CLK
V
th
Figure 5. Differential Input Driven
Single−Ended
V
IH
V
IL
V
IHmax
V
ILmax
V
IH
V
th
V
IL
V
IHmin
V
ILmin
V
CC
V
thmax
V
thmin
V
EE
V
th
CLK/D/R
CLK/D/R
V
ILDmax
V
IHDmax
V
IHDtyp
V
ILDtyp
V
IHDmin
V
ILDmin
V
CMR
V
EE
V
ID
= V
IHD
− V
ILD
V
CC
CLK
CLK
Q
Q
t
PLH
t
PHL
V
OUTPP
= V
OH
(Q) − V
OL
(Q)
V
INPP
= V
IH
(CLK) − V
IL
(CLK)
V
IHD
V
ILD
V
ID
= |V
IHD(CLK)
− V
ILD(CLK)|
CLK
CLK
Figure 6. Differential Inputs
Driven Differentially
Figure 7. V
th
Diagram Figure 8. Differential Inputs Driven Differentially
Figure 9. V
CMR
Diagram Figure 10. AC Reference Measurement
CLK
CLK
V
CMRmax
V
CMRmin
CLK
P1-P3P4-P6P7-P9P10-P10

NB7V52MMNTXG

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