6
FN3690.11
April 25, 2013
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
For additional products, see www.intersil.com/en/products.html
Die Characteristics
SUBSTRATE POTENTIAL:
V-
TRANSISTOR COUNT:
156
Metallization Mask Layout
HA5351
FIGURE 13. HOLD MODE SETTLING TIME (±200μV)
Typical Performance Curves (Continued)
0.02
0.00
-0.02
-0.04
0 20406080
0
5
10
TIME (ns)
51.4 ns
OUTPUT (V)
S
/H CONTROL (V)
OUTPUT
+IN
-IN
V-V- V-
V
OUT
V
OUT
S/H CONTROL
V+ V+ V+GNDGNDGND
HA5351
