16
LTC4221
4221fa
ON1 clears its off threshold and the initial timing cycle is
complete, the GATE1 pin is pulled up by a 9.5μA current
source connected to the charge pump output during the
channel start-up cycle. GATE1 can be servoed by adjusting
the ramp up current to <9.5μA to control the inrush
current to the load during start-up. ON2 controls GATE2 in
a similar manner but is overwritten by ON1’s global reset
function. During an overcurrent fault condition that sets
the fault latch, both GATE pins are pulled down by their
respective internal N-channel MOSFET pull-downs.
During hot insertion of the PCB, an abrupt application of
supply voltage charges the external MOSFET drain/gate
capacitance. This can cause an unwanted gate voltage
spike. An internal proprietary circuit holds both GATE pins
low before the internal circuitry wakes up. This reduces the
MOSFET current surges substantially at insertion.
Electronic Circuit Breaker
The LTC4221 features an electronic circuit breaker func-
tion that protects against supply overvoltage, externally
generated fault conditions and shorts or excessive load
current conditions on any of the supplies. If the circuit
breaker trips, both GATE pins are immediately pulled to
ground, the external N-channel MOSFETs are quickly
turned OFF and FAULT is latched low.
During the normal cycle, a supply overvoltage on channel
n
propagates via the V
OUT
n
resistive dividers to the FB
n
pin.
A supply overvoltage high enough to pull either FB pin
above 0.822V for more than 18μs will trip the circuit
breaker.
The circuit breaker can also be made to trip by externally
forcing the bidirectional FAULT pin below 0.816V. The
FAULT pin has 35mV of hysteresis. An internal glitch filter
of 15μs filters out noise on the FAULT pin.
The slow comparator of channel
n
trips the circuit breaker
if V
RSENSE
n
= (V
CC
n
– V
SENSE
n
) is greater than its 25mV
threshold for more than 15μs. There may be applications
where this inherent response time is not long enough, for
example, because of excessive supply voltage noise. To
adjust the response time of the slow comparator, a capaci-
tor can be connected from the FILTER pin to GND. If this
pin is left unused, each slow comparator’s delay defaults
to 15μs. During normal operation, the FILTER output pin
is held low by an internal 1.8μA pull-down current source.
During an overcurrent condition on either channel as
shown in Figure 6, the 1.8μA pull-down on the FILTER pin
becomes an internal 105μA pull-up and C
FILTER
charges
up. Once the FILTER pin voltage ramps past its low-to-
high threshold of 1.24V at time point 2, the electronic
circuit breaker trips and the LTC4221 shuts down. The
FILTER pin’s internal 1.8μA pull-down discharges C
FILTER
and holds FILTER low. Each slow comparator’s response
time from an overcurrent fault condition is:
t
VC
A
s
FILTER
FILTER
=
μ
+ μ
124
105
15
.•
(1)
Intermittent overloads may exceed the current limit as in
Figure 7, but if the duration is sufficiently short, the FILTER
pin may not reach the V
FILTER(TH)
threshold and the
LTC4221 will not shut down. To handle this situation, the
FILTER discharges with 1.8μA whenever both V
RSENSE
are
below 25mV. Any intermittent overload with an aggregate
APPLICATIO S I FOR ATIO
WUUU
Figure 7. Multiple Intermittent Overcurrent Condition
A1 B1 A2 B2 A3 B3
~25mV/R
SENSE1
~25mV/R
SENSE2
CIRCUIT BREAKER
TRIPS
1.8μA
1.8μA
4221 F07
1.8μA
105μA
105μA
105μA
I
LOAD1
I
LOAD2
V
FILTER
V
GATE
1.24V
1.8μA
SLOW
COMPARATOR
TRIP
SLOW
COMPARATOR
TRIP
SLOW
COMPARATOR
TRIP
Figure 6. A Continuous Fault Timing
1.24V
12
NORMAL SLOW
COMPARATOR
TRIP
V
FILTER
CIRCUIT BREAKER TRIPS.
GATE1, GATE2 AND
FAULT PULL LOW
1.8μA
1.8μA
4221 F06
1.8μA
105μA
17
LTC4221
4221fa
duty cycle of more than 1.8% will eventually trip the circuit
breaker. Figure 8 shows the circuit breaker response time
in seconds normalized to 1μF. The asymmetric charging and
discharging of FILTER is a fair gauge of MOSFET heating.
t
CF
V
AD A
FILTER
μ
()
=
μ
()
μ
124
105 1 8
.
•–.
(2)
The fast comparators trip the circuit breaker to protect
against fast load overcurrents if V
RSENSE
is greater than
V
SENSE(FC)
(100mV) for 1μs. The response time of each fast
comparator is fixed at 1μs nominal. The timing diagram in
Figure 9 illustrates the operation of the LTC4221 when the
load current conditions cause V
RSENSE
of channel 1 to ex-
ceed 100mV for more than 1μs between time points 7 and
8. Figure 9 also illustrates when the LTC4221’s electronic
circuit breaker is armed. After the initial timing cycle, it is
armed at time point 3. Arming the circuit breaker at time
point 3 ensures that the system is protected against an over-
current condition during the channel start-up cycle. At time
point 4, the slow comparators are armed when the internal
control loop is disengaged.
Autoretry After a Fault
Once the LTC4221 circuit breaker is tripped, FAULT is
latched low and both GATE pins are pulled to ground. To
clear the internal FAULT latch and to restart the LTC4221,
its ON1 pin must be pulsed below its reset threshold
(V
ON(RESET)
= 0.4V) for at least 15μs.
APPLICATIO S I FOR ATIO
WUUU
TIMER
FAULT
FILTER
ON
n
0.851V
GATE
n
SENSE
n
V
OUT
n
RESET INITIAL TIMING
21
1.9μA
V
TMR(L)
V
TMR(H)
ELECTRONIC CIRCUIT BREAKER
ARMED
SLOW COMPARATORS
ARMED
3
20μA
20μA
1.8μA
0.4V
105μA
9.5μA
V
FILTER(TH)
V
SENSE(FC)
V
SENSE(SC)
45 6 7 8 9
RESET
4221 F09
CHANNEL
START-UP
NORMAL FAULT
Figure 9. Fast Comparator Trip Timing Waveforms
Figure 8. Circuit Breaker Filter Response
for Intermittent Overload
OVERLOAD DUTY CYCLE, D (%)
NORMALIZED RESPONSE TIME (s/μF)
1
0.01
0.1
0 102030405060708090100
4221 F08
t
C
FILTER
(μF)
1.24V
105 • D – 1.8
=
18
LTC4221
4221fa
The LTC4221 can also be configured to automatically retry
after a fault condition. As shown in Figure 10, the FAULT
(which has an internal 3.8μA pull-up current source) and
both ON pins are connected together. The timing diagram
in Figure 11 illustrates a simultaneous start-up sequence
where the LTC4221 is powered up into a load overcurrent
condition on channel 1. After the slow comparators are
armed at the end of the start-up cycle at time point 4, slow
comparator 1 immediately trips and FILTER ramps up.
FILTER ramps past its high threshold at time point 6 and
trips the circuit breaker. FAULT and both ON pins are
pulled low by an internal N-channel MOSFET and over-
shoots below the 0.4V reset threshold of the ON1 pin.
Once ON1 < 0.4V for more than 15μs, the internal fault
APPLICATIO S I FOR ATIO
WUUU
+
V
CC1
ON1
SENSE1ON2
FAULT
R
F2
15k
LTC4221*
GATE1
FB1
4221 F10
1
16
7
10
9
C
TIMER
1μF
GND
TIMER
R
F1
56k
V
OUT1
3.3V
5A
V
OUT2
2.5V
5A
Q1
IRF7413
R
SENSE1
0.004Ω
C
LOAD1
8
C
FILTER
1nF
FILTER
Z1
Q2: 2N7002LT1
Z1: SMAJ10
* ADDITIONAL DETAILS
OMITTED FOR CLARITY
R
X1
10Ω
C
X1
100nF
C
ON1
0.47μF
R1
1M
LONG
V
CC1
LONG
PCB EDGE
CONNECTOR
(MALE)
SHORT
BACKPLANE
CONNECTOR
(FEMALE)
LONG
V
CC2
FAULT
Figure 10. Using FAULT to Configure Autoretry
213456789
20μA
ELECTRONIC CIRCUIT BREAKER
ARMED
20μA2μA
1.8μA
0.4V
0.4V
0.851V
V
FILTER(TH)
V
SENSE(FC)
V
SENSE(SC)
9.5μA
105μA
1.9μA
V
TMR(L)
V
TMR(H)
0.851V
TIMER
ON
n
, FAULT
FILTER
GATE1
SENSE1
V
OUT1
RESET CHANNEL
START-UP
FILTER
RAMP
RESET
t
ON
t
INITIAL
OFF INITIAL
TIMING
4221 F11
INITIAL TIMING
t
INITIAL
t
STARTUP
t
FILTER
SLOW COMPARATORS
ARMED
Figure 11. Autoretry Timing Waveforms

LTC4221CGN#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers 2x Hot Swap Cntr/Pwr Sequencer w/ 2x Spe
Lifecycle:
New from this manufacturer.
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