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MC14099BDWR2G
P1-P3
P4-P6
P7-P7
MC14099B
http://onsemi.com
4
RESET
DA
T
A
WRITE
DISABLE
A0
A1
A2
(M.S.B.)
7
6
5
4
3
2
ADDRESS
DECODER
TO
OTHER
LA
TCHES
ZERO
SELECT
OTHER LA
TCHES
EACH LA
TCH
14Q5
1Q7
15Q6
13Q4
12Q3
1
1Q2
10Q1
9Q0
FUNCTION DIAGRAM
TRUTH T
ABLE
Write
Disable
Reset
Addressed
Latch
Unaddressed
Latches
0
0
Data
Q
n
*
0
1
Data
Reset
{
1
0
Q
n
*
Q
n
*
1
1
Reset
Reset
*Q
n
is previous state of latch.
†
Reset to zero state.
CAUTION:
T
o avoid unintentional data changes in the latches, W
rite
Disable must be active (high) during transitions on the
address inputs A0, A1, and A2.
MC14099B
http://onsemi.com
5
SWITCHING W
A
VEFORMS
DA
T
A OR
WRITE DISABLE
OUTPUT Q
RESET
OUTPUT Q
V
DD
V
SS
V
DD
V
SS
t
PHL
50%
t
TLH
t
THL
90%
50%
10%
50%
t
PLH
t
PHL
ADDRESS
WRITE
DISABLE
DA
T
A
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
50%
50%
50%
t
su
t
w(L)
t
rem
t
su
t
h
t
w(H)
MC14099B
http://onsemi.com
6
ORDERING INFORMA
TION
Device
Package
Shipping
†
MC14099BDWG
SOIC−16
WB
(Pb−Free)
47 Units / Rail
MC14099BDWR2G
SOIC−16 WB
(Pb−Free)
1000 Units / T
ape & Reel
NL
V14099BDWR2G*
SOIC−16 WB
(Pb−Free)
1000 Units / T
ape & Reel
†
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
ape and Reel
Packaging
Specifications Brochure, BRD801
1/D.
*NL
V
Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PP
AP
Capable.
P1-P3
P4-P6
P7-P7
MC14099BDWR2G
Mfr. #:
Buy MC14099BDWR2G
Manufacturer:
ON Semiconductor
Description:
Latches 3-18V 8-Bit Addressable
Lifecycle:
New from this manufacturer.
Delivery:
DHL
FedEx
Ups
TNT
EMS
Payment:
T/T
Paypal
Visa
MoneyGram
Western
Union
Products related to this Datasheet
MC14099BDWR2G
NLV14099BDWR2G
MC14099BCP
MC14099BCPG