LTC4410ES6#TRMPBF

4
LTC4410
sn4410 4410fs
V
IN
(Pin 1): Positive Input Supply. When V
IN
> 4.2V, the
internal undervoltage lockout enables the main switch that
connects V
IN
to V
OUT
. Bypass V
IN
with a 10µF ceramic
capacitor and a 1 resistor in series or use a 10µF
capacitor with at least 1 minimum ESR. This minimizes
the voltage transient that can occur when the input is hot
switched.
GND (Pin 2): Signal Ground for the LTC4410.
MODE (Pin 3): Mode Select Input. This pin selects the
maximum USB port current of either 100mA or 500mA.
When MODE is high, the current out of CHP will be I
VOUT
/
1000. When MODE is low, the current out of CHP will be
I
VOUT
/1000 + 370µA (typical).
BLOCK DIAGRA
W
THERMAL
SHUTDOWN
M2
×1000
VB
USBP
M1
×1
M3
370µA
S1MODE
CHP
R1
+
REF
1.25V
R3
R2
V
IN
1
3
5
V
OUT
6
GND
4410 BD
USBP
2
4
+
BODY
SWITCH
+
UU
U
PI FU CTIO S
USBP (Pin 4): USB Voltage Present Output. This pin goes
high when V
IN
exceeds the undervoltage lockout threshold
(4.2V typical).
CHP (Pin 5): Charger Program Output. This pin sources a
current that is used by the battery charger to control
charge current.
V
OUT
(Pin 6): LTC4410 Output. Bypass this pin with a
10µF or larger X5R ceramic capacitor. This capacitor
may be omitted if other circuitry connected to V
OUT
contains a bypass capacitor. When V
OUT
> V
IN
, the internal
switch is held off, resulting in very low battery drain
current (1µA typical).
5
LTC4410
sn4410 4410fs
OPERATIO
U
The LTC4410 manages the total current consumption
between a battery charger and a USB portable device. In
a system using the LTC4410, a battery charger can be set
up to charge at the maximum available current from the
USB port without any need to reserve current for the
device load. As the USB device current increases, the
LTC4410 decreases the battery charge current so as not
to exceed the maximum allowable current from the USB
port. This allows for simultaneous battery charging and
device operation. The LTC4410 can only reduce the bat-
tery charge current to zero. It is the responsibility of the
USB device load to not exceed the USB power limits.
The LTC4410 uses an internal power MOSFET to sense
load current. This MOSFET is held off when V
OUT
> V
IN
or
V
IN
< 4.2V (typ). A replica of the I
VOUT
current equal to
I
VOUT
/1000 is sourced out of the CHP pin with an accuracy
of ±6%. This current can be summed into the PROG node
of a battery charger to reduce the charge current. The
LTC4410 is primarily designed to interface with battery
chargers that use a program pin to set the maximum
charge current, with a charge current to program pin
current ratio of 1000:1. The voltage on CHP can be
externally monitored to signal overcurrent conditions.
When V
IN
> 4.2V, the internal USB present comparator
forces the USBP pin high. This signal can be used to detect
when the USB voltage is present and drive an external
switch to connect or disconnect a battery from the USB
peripheral.
The MODE pin controls the state of an internal 370µA
current reference (I
REF
). When active (MODE pin low), the
total current sourced out of CHP is I
VOUT
/1000 +I
REF
. The
primary function of the current reference is to offset the
battery charger charge current for 100mA mode. When
MODE is high, the current reference is disabled. The total
current out of CHP with MODE high is I
VOUT
/1000. The
MODE controlled current offset makes it possible to con-
figure the battery charger and the LTC4410 to support the
USB specification 1.0 and 2.0 required 100mA and 500mA
modes of operation.
The low quiescent current (80µA, when MODE is high) of
the LTC4410 makes the system easily compliant with the
USB specifications 1.0 and 2.0 SUSPEND MODE current
consumption requirements.
When V
OUT
> V
IN
, the LTC4410 transitions to low power
mode, draining 1µA (typical) from the Lithium-Ion battery.
This condition occurs when the USB device is operating
off of its internal battery and not connected to the USB
port.
6
LTC4410
sn4410 4410fs
APPLICATIO S I FOR ATIO
WUUU
USB Power Management and Wall Adapter Power
With the addition of a few components, the LTC4410
allows for simultaneous device operation and battery
charging while connected to USB port or wall adapter. The
LTC4410 will proportionally reduce the battery charge
current to keep the total current within the current rated for
the wall adapter. Figure 1 shows an example of how to
combine the USB power and wall adapter inputs. A
P-channel MOSFET, MP1, is used to prevent back con-
ducting into the USB port when a wall adapter is present.
The pull-down resistor, R1, is to assure that MP1 is on
when there is no wall adapter. The Schottky diode, D1, is
used to prevent USB power loss through R1. If the wall
adapter used has more than 500mA capability, a resistor,
R3, connected in parallel with R2 using N-channel MOSFET
MN1 will increase the charge current when the wall adapter
is present. In this example the battery charge current is
340mA without the wall adapter (see the LTC4053 data
sheet for details on how to program the battery charge
current). When the wall adapter is present, the charge
current is 750mA.
4.7µF
1
R1
1k
D1
R3
4.87k
1%
MN1
R2
3.4k
1%
V
OUT
LTC4410
V
IN
GND
USBP
CHP
MP1
MODE100mA 500mA
4.35V TO 5.25V
FROM USB
5V WALL ADAPTER
750mA
0.1µF
GND
NTC
TIMER
LTC4053
V
IN
BAT
1-CELL
Li-Ion
SHDN
OFF
ON
4410 F01
PROG
4.7µF
1M
I
LOAD
MP2
SYSTEM
POWER SUPPLY
Figure 1. USB Power Management and Wall Adapter Power

LTC4410ES6#TRMPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management USB Pwr Manager in SOT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet