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AD8275BRMZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
AD8275
Rev. A | Page 12 of 16
POWER SUPPLIES
Use a stable dc voltage to power the AD8275. Noise on the
supply pins can adversely affect performance. Place a bypass
capacitor of 0.1 µF between each supply pin and ground, as
close to each pin as possible. A tantalum capacitor of 10 µF
should also be used between each supply and ground. It can
be farther away from the AD8275 and typically can be shared
by other precision integrated circuits.
REFERENCE
The reference terminals are used to provide a bias level for the
output. For example, in a single-supply 5 V operation, the
reference terminals can be set so that the output is biased at
2.5 V. This ensures that the output can swing positive or
negative around a 2.5 V level.
Figure 33 and Figure 34 illustrate two different ways to set the
reference voltage. See the Basic Connection section for the
differences between the two settings.
The allowable reference voltage range is a function of the
common-mode input and supply voltages. The REF1 and REF2
pins should not exceed either +V
S
or −V
S
by more than 0.5 V.
The REFx terminals should be driven by low source impedance
because parasitic resistance in series with REF1 and REF2 can
adversely affect CMRR and gain accuracy.
20kΩ
20kΩ
REF2
REF1
50kΩ
–IN
INCORRECTCORRECT
07546-033
7
4
5
6
8
1
2
50kΩ
50kΩ
20kΩ
20kΩ
10kΩ
3
–IN
+IN
REF2
V
REF
REF1
–V
S
+V
S
OUT
SENSE
3
AD8275
7
4
5
6
8
2
50kΩ 10kΩ
3
+IN
V
REF
–V
S
+V
S
OUT
SENSE
AD8275
1
20kΩ
20kΩ
REF2
REF1
50kΩ
–IN
7
4
5
6
8
1
2
50kΩ
50kΩ
20kΩ
20kΩ
10kΩ
3
–IN
+IN
REF2
V
REF
REF1
–V
S
+V
S
OUT
SENSE
AD8275
4
5
6
8
2
50kΩ 10kΩ
3
+IN
V
REF
–V
S
+V
S
OUT
SENSE
AD8275
1
IN
2
50
0kΩ
R
REF1
1
0kΩ
5
+IN
NSE
IN
2
50
0kΩ
R
REF1
1
0kΩ
5
+IN
O
NSE
7
Figure 35. REF1 and REF2 Pin Guidelines
COMMON-MODE INPUT VOLTAGE RANGE
The common-mode voltage range is a function of the input
voltage range of the internal op amp, the supply voltage, and
the reference voltage.
Equation 1 expresses the maximum positive common-mode
voltage range.
V
CM_POS
≤ 13.14(+V
S
) – 7.14(–V
S
) – 5((REF1 + REF2)/2) – 29.69 (1)
Equation 2 expresses the minimum common-mode voltage
range.
V
CM_NEG
≥ 6(–V
S
) – 5((REF1 + REF2)/2) – 0.11 (2)
The voltage range of the internal op amp varies depending on
temperature. The equations reflect a typical input voltage range
of +V
S
− 0.9 V and −V
S
+ 1.35 V over temperature. Table 5 lists
expected common-mode ranges for typical configurations.
Table 5. Expected Common-Mode Voltage Range for Typical
Configurations
+V
S
(V)
1
V
REF1
(V) V
REF2
(V) V
CM
+ (V) V
CM
− (V)
5 5 0 23.5 −12.6
5 2.5 0 29.8 −6.4
5 4.096 0 25.8 −10.4
3.3 3.3 0 5.4 −8.4
3.3 2.5 0 7.4 −6.4
5 5 5 11.0 −25.1
5 4.096 4.096 15.5 −20.6
5 3 3 21.0 −15.1
5 2.5 2.5 23.5 −12.6
5 2.048 2.048 25.8 −10.4
5 1.25 1.25 29.8 −6.4
5 0 0 36.0 −0.1
1
–V
S
= 0 V.
INPUT PROTECTION
The inputs of the AD8275, +IN and −IN, are protected by ESD
diodes that clamp 40 V above −V
S
and 40 V below +V
S
. When
operating on a single +5 V supply, the ESD diode conducts at
input voltages less than −35 V and greater than +40 V.
If the input voltage is expected to exceed the maximum ratings
of the AD8275, use external transorbs. Adding series resistors to
the inputs of the AD8275 is not recommended because the
internal resistor ratios are matched to provide optimal CMRR
and gain accuracy. Adding external series resistors to the input
degrades the performance of the AD8275.
All other pins are protected by ESD diodes that clamp 0.5 V
beyond either supply rail. For example, the voltage range of the
REF1 and REF2 pins on a 5 V supply is −0.5 V to +5.5 V.
AD8275
Rev. A | Page 13 of 16
CONFIGURATIONS
Figure 36 and Figure 37, along with Table 6 and Table 7, provide
examples of the possible input and output ranges for various
supplies and reference voltages.
Note that Table 6 and Table 7 list the typical voltage range of the
AD8275; these values do not reflect variation over process or
temperature.
HI
+SWING
–SWING
USEFUL V
OUT
LINEAR V
IN
RANGE
LO
HI
LO
MID
07546-136
V
REF
AD8275
7
4
5
6
8
2
50kΩ
0.1µF
50kΩ
20kΩ
20kΩ
10kΩ
3
+IN
–IN
V
INP
V
INN
REF2
REF1
–V
S
+V
S
+5V
OUT
SENSE
1
V
OUT
HI
+SWING
–SWING
USEFUL V
OUT
LINEAR V
IN
RANGE
LO
HI
LO
MID
07546-137
V
REF
AD8275
7
4
5
6
8
2
50kΩ
0.1µF
50kΩ
20kΩ
20kΩ
10kΩ
3
+IN
–IN
REF2
REF1
–V
S
+V
S
+5V
OUT
SENSE
1
V
OUT
V
INP
V
INN
Figure 36. Split Reference Figure 37. Shared Reference
Table 6. Input and Output Relationships for Split Reference
Configuration in Figure 36
+V
S
1
V
REF
V
OUT
for
V
IN
= 0 V
Linear
Differential
V
IN
Range
Useful V
OUT
Ranges
5 V 5 V 2.5 V High: +12 V
Mid: 0 V
Low: −12.3 V
High: +4.95 V
Swing: +2.45 V,
−2.455 V
Low: +0.045 V
5 V 2.5 V 1.25 V High: +18.3 V
Mid: 0 V
Low: −6 V
High: +4.95 V
Swing: +3.7 V,
−1.205 V
Low: +0.045 V
5 V 4.096 V 2.048 V High: +14.3 V
Mid: 0 V
Low: −10 V
High: +4.95 V
Swing: +2.902 V,
−2.003 V
Low: +0.045 V
3.3 V 3.3 V 1.65 V High: +8 V
Mid: 0 V
Low: −8 V
High: +3.24 V
Swing: +1.59 V,
−1.605 V
Low: +0.045 V
3.3 V 2.5 V 1.25 V High: +10 V
Mid: 0 V
Low: −6 V
High: +3.24 V
Swing: +1.99 V,
−1.205 V
Low: +0.045 V
1
−V
S
= 0 V.
Table 7. Input and Output Relationships for Shared
Reference Configuration in Figure 37
+V
S
1
V
REF
V
OUT
for
V
IN
= 0 V
Linear
Differential
V
IN
Range
Useful V
OUT
Ranges
5 V 5 V 5 V High: −0.1 V
Mid: 0 V
Low: −24.7 V
High: +4.98 V
Swing: −4.94 V
Low: +0.06 V
5 V 4.096 V 4.096 V High: +4.4 V
Mid: 0 V
Low: −20.2 V
High: +4.98 V
Swing: +0.884 V
to −4.03 V
Low: +0.06 V
5 V 3 V 3 V High: +9.5 V
Mid: 0 V
Low: −14.8 V
High: +4.95 V
Swing: +1.9 V,
−2.955 V
Low: +0.045 V
5 V 2.5 V 2.5 V High: +12 V
Mid: 0 V
Low: −12.3 V
High: +4.95 V
Swing: +2.45 V,
−2.455 V
Low: +0.045 V
5 V 2.048 V 2.048 V High: +14.3 V
Mid: 0 V
Low: −10 V
High: +4.95 V
Swing: +2.902 V,
−2.003 V
Low: +0.045 V
5 V 1.25 V 1.25 V +18.3 V to
−6 V
High: +4.95 V
Swing: +3.7 V,
−1.205 V
Low: +0.045 V
0 V 0 V 0 V 24.5 V to 0.2 V High: 4.95 V
Swing: 4.95 V
Low: 0.045 V
1
−V
S
= 0 V.
AD8275
Rev. A | Page 14 of 16
APPLICATIONS INFORMATION
DRIVING A SINGLE-ENDED ADC
The AD8275 provides the common-mode rejection that SAR
ADCs often lack. In addition, it enables designers to use cost-
effective, precision, 16-bit ADCs such as the AD7685, yet still
condition ±10 V signals.
One important factor in selecting an ADC driver is its ability to
settle within the acquisition window of the ADC. The AD8275
is able to drive medium speed SAR ADCs.
In Figure 38, the 2.7 nF capacitor serves to store and deliver
necessary charge to the switched capacitor input of the ADC.
The 33 Ω series resistor reduces the burden of the 2.7 nF load
from the amplifier and isolates it from the kickback current
injected from the switched capacitor input of the AD7685. The
output impedance of the amplifier can affect the THD of the
ADC. In this case, the combined impedance of the 33 Ω resistor
and the output impedance of the AD8275 provides extremely
low THD of −112 dB. Figure 39 shows the ac response of the
AD8275 driving the AD7685.
07546-034
VREF
(ADR444,
ADR445)
AD8275
7
4
5
6
8
2
50kΩ
0.1µF
50kΩ
20kΩ
20kΩ
33Ω
10kΩ
3
+IN
–IN
VIN
REF2
REF1
–V
S
+V
S
+5V
OUT
SENSE
0.1µF
2.7nF
10µF
1
AD7685
VDD
GNDREF
IN+
IN–
Figure 38. Driving a Single-Ended ADC
Figure 39. FFT of AD8275 Directly Driving the AD7685 Using the 5 V
Reference of the Evaluation Board (Input = 20 V p-p, 1 kHz, THD = −112 dB)
The AD8275 can condition signals for higher resolution ADCs
such as 18-bit SAR converters, provided that a narrower
bandwidth is sampled to limit noise.
DIFFERENTIAL OUTPUTS
In certain applications, it is necessary to create a differential signal.
For example, high resolution ADCs often require a differential
input. In other cases, transmission over a long distance can require
differential signals for better immunity to interference.
Figure 40 shows how to configure the AD8275 to output a
differential signal. The AD8655 op amp is used in an inverting
topology to create a differential voltage. VREF sets the output
midpoint. Errors from the op amp are common to both outputs
and are thus common mode. Likewise, errors from using
mismatched resistors cause a common-mode dc offset error.
Such errors are rejected in differential signal processing by
differential input ADCs or by instrumentation amplifiers.
When using this circuit to drive a differential ADC, V
REF
can be
set using a resistor divider from the ADC reference to make the
output ratiometric with the ADC.
07546-035
AD8275
7
4
5
6
8
2
50kΩ
0.1µF
0.1µF
8.2µF
50kΩ
20kΩ
20kΩ
2kΩ
2kΩ
10kΩ
3
+IN
–IN
REF2
REF1
–V
S
+V
S
+5V
+10V
–10V
+5V
OUT
SENSE
1
AD8655
V
REF
= 2.5V
+V
OUT
–V
OUT
+3.5V
+1.5V
+2.5V
+3.5V
+1.5V
+2.5V
Figure 40. AD8275 Configured for Differential Output (for Driving a Differential ADC)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

AD8275BRMZ

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Manufacturer:
Analog Devices Inc.
Description:
Differential Amplifiers Level Translation 16-Bit ADC Dvr
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