4
FN6409.0
December 18, 2006
ON Leakage Current, I
Dx
V
DD
= 3.3V, IN = 3.3V, CTRL = 0V or 3.3V, V
D+
or
V
D-
= 2.0V, V
COM-
,V
COM+
, V
L
and V
R
= float
25 -10 2 10 nA
Full -75 - 75 nA
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
ON
V
DD
= 2.7V, R
L
= 50, C
L
= 10pF, (See Figure 1) 25 - 67 - ns
Turn-OFF Time, t
OFF
V
DD
= 2.7V, R
L
= 50, C
L
= 10pF, (See Figure 1) 25 - 48 - ns
Break-Before-Make Time Delay, t
D
V
DD
= 2.7V, R
L
= 50, C
L
= 10pF, (See Figure 2) 25 - 18 - ns
Skew, t
SKEW
V
DD
= 3.3V, IN = 3.3V, CTRL = 0V or 3.3V, R
L
= 45,
C
L
= 10pF,t
R
= t
F
= 750ps at 480Mbps,
(Duty Cycle = 50%) (See Figure 7)
25 - 50 - ps
Total Jitter, t
J
V
DD
= 3.3V, IN = 3.3V, CTRL = 0V or 3.3V, R
L
= 45,
C
L
= 10pF,t
R
= t
F
= 750ps at 480Mbps
25 - 210 - ps
Propagation Delay, t
PD
V
DD
= 3.3V, IN = 3.3V, CTRL = 0V or 3.3V, R
L
= 45,
C
L
= 10pF,See Figure 7)
25 - 250 - ps
Crosstalk (Channel-to-Channel),
R to COM-, L to COM+
V
DD
= 3.3V, IN = 0V, CTRL = 3.3V, R
L
= 32,
f = 20Hz to 20kHz, V
R
or V
L
= 0.707V
RMS
(2V
P-P
),
(See Figure 6)
25 - -110 - dB
Total Harmonic Distortion f = 20Hz to 20kHz, V
DD
= 3.0V, IN = 0V,
CTRL = 3.0V,
V
L
or V
R
= 0.707V
RMS
(2V
P-P
), R
L
= 32
25 - 0.06 - %
USB Switch -3dB Bandwidth Signal = 0dBm, 0.2V
DC
offset, R
L
= 50,C
L
= 5pF 25 - 630 - MHz
D+/D- OFF Capacitance, C
D+(OFF)
,
C
D-(OFF)
f = 1MHz, V
DD
= 3.3V, IN = 0V, CTRL = 3.3V,
V
D-
or V
D+
= V
COMx
= 0V, (See Figure 5)
25 - 6 - pF
L/R OFF Capacitance, C
LOFF
,
C
ROFF
f = 1MHz, V
DD
= 3.3V, IN = 0V, CTRL = 0V or 3.3V,
V
L
or V
R
= V
COMx
= 0V, (See Figure 5)
25 - 9 - pF
COM ON Capacitance, C
COM-(ON)
,
C
COM+(ON)
f = 1MHz, V
DD
= 3.3V, IN = 3.0V, CTRL = 0V or 3.3V,
V
D-
or V
D+
= V
COMx
= 0V, (See Figure 5)
25 - 10 - pF
POWER SUPPLY CHARACTERISTICS
Power Supply Range, V
DD
Full 1.8 - 5.5 V
Positive Supply Current, I
DD
V
DD
= 3.6V, IN = 0V or 3.6V, CTRL = 3.6V 25 - 6 8 A
Full - - 10 A
Positive Supply Current, I
DD
(Low Power State)
V
DD
= 3.6V, IN = 0V, CTRL = 0V or float 25 - 1 7 nA
Full - - 140 nA
DIGITAL INPUT CHARACTERISTICS
Voltage Low, V
INL
, V
CTRLL
V
DD
= 2.7V to 3.6V Full - - 0.5 V
Voltage High, V
INH
, V
CTRLH
V
DD
= 2.7V to 3.6V Full 1.4 - - V
Input Current, I
INL
,
I
CTRLL
V
DD
= 3.6V, IN = 0V, CTRL = 0V Full -50 20 50 nA
Input Current, I
INH
V
DD
= 3.6V, IN = 3.6V, CTRL = 0V Full -50 20 50 nA
Input Current, I
CTRLH
V
DD
= 3.6V, IN = 0V, CTRL = 3.6V Full -2 1.1 2 A
CTRL Pull-Down Resistor, R
CTRL
V
DD
= 3.6V, IN = 0V, CTRL = 3.6V Full - 4 - M
NOTES:
4. V
LOGIC
= Input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Parameters with limits are 100% tested at +25°C. Limits across the full temperature range are guaranteed by design and correlation.
7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range..
8. R
ON
matching between channels is calculated by subtracting the channel with the highest max R
ON
value from the channel with lowest max
R
ON
value, between L and R or between D+ and D-.
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: V
DD
= +3.3V, GND = 0V, V
INH
= 1.4V, V
INL
= 0.5V, V
CTRLH
= 1.4V,
V
CTRLL
= 0.5V, (Notes 4, 6), unless otherwise specified. (Continued)
PARAMETER TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN TYP
(NOTE 5)
MAX UNITS
ISL54206
5
FN6409.0
December 18, 2006
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. C
L
includes fixture and stray
capacitance.
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
FIGURE 2A. MEASUREMENT POINTS
Repeat test for all switches. C
L
includes fixture and stray
capacitance.
FIGURE 2B. TEST CIRCUIT
FIGURE 2. BREAK-BEFORE-MAKE TIME
FIGURE 3. AUDIO R
ON
TEST CIRCUIT FIGURE 4. USB R
ON
TEST CIRCUIT
50%
t
r
<20ns
t
f
<20ns
t
OFF
90%
V
DD
0V
V
INPUT
0V
t
ON
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
90%
V
OUT
V
OUT
V
(INPUT)
R
L
R
L
R
ON
+
------------------------------
=
SWITCH
INPUT
V
IN
V
OUT
R
L
C
L
COMx
Audio or USB
IN
50
10pF
GND
V
DD
C
CTRL
V
INPUT
90%
V
DD
0V
t
D
LOGIC
INPUT
SWITCH
OUTPUT
0V
V
OUT
V
IN
IN
COMx
R
L
C
L
V
OUT
10pF
50
D- or D+
L or R
V
DD
GND
V
INPUT
C
CTRL
V
DD
C
OV
L OR R
COMx
IN
GND
V
L OR R
V
1
R
ON
= V
1
/100mA
100mA
Repeat test for all switches.
CTRL
V
DD
C
VDD
D- OR D+
COMx
IN
GND
V
D- OR D+
V
1
R
ON
= V
1
/40mA
40mA
Repeat test for all switches.
CTRL
ISL54206
6
FN6409.0
December 18, 2006
FIGURE 5. CAPACITANCE TEST CIRCUIT FIGURE 6. AUDIO CROSSTALK TEST CIRCUIT
FIGURE 7A. MEASUREMENT POINTS FIGURE 7B. TEST CIRCUIT
FIGURE 7. SKEW TEST
Test Circuits and Waveforms (Continued)
V
DD
C
GND
AUDIO OR USB
COMx
IN
IMPEDANCE
ANALYZER
0V or
Repeat test for all switches.
CTRL
V
DD
0V
ANALYZER
V
DD
C
L OR R
SIGNAL
GENERATOR
R
L
GND
IN
COMx
32
NC.
COMx
R OR L
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
CTRL
DIN+
DIN-
OUT+
OUT-
50%
50%
90%
10%
10%
10%
10%
90%
90%
50%
90%
50%
t
ri
t
fi
t
ro
t
f0
t
skew_i
t
skew_o
OUT+
C
L
COM-
D+
GND
V
DD
C
D-
COM+
C
L
OUT-
DIN+
DIN-
|tro - tri| Delay Due to Switch for Rising Input and Rising Output Signals.
|tfo - tfi| Delay Due to Switch for Falling Input and Falling Output Signals.
|tskew_0| Change in Skew through the Switch for Output Signals.
|tskew_i| Change in Skew through the Switch for Input Signals.
15.8
15.8
143
143
45
45
CTRL
IN
V
DD
ISL54206

ISL54206IRZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
USB Switch ICs AUD/USB 2 0 HI SPD SWITCH 10LD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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