PL602-39QC-R

PL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC’s
Micrel Inc. 2 180 Fortune Drive San Jose, CA 95131 USA tel +1(408) 944 -0800 fax +1(408) 474-1000 www.micrel.com Rev 03/07/2 012 Page 1
FEATURES
Selectable 750kHz to 800MHz range.
Low phase noise output
-127dBc/Hz for 155.52MHz @ 10kHz offset
-115dBc/Hz for 622.08MHz @ 10kHz offset
LVCMOS (PL602-37), LVPECL (PL602-35 and
PL602-38) or LVDS (PL602-39) output.
12MHz to 25MHz crystal input.
No external crystal load capacitors required.
Output Enable selector.
Selectable /16 to x32 frequency divider/multiplier.
3.3V operation.
Available in 16-Pin TSSOP or 16-pin 3x3mm QFN
GREEN/RoHS compliant packages.
DESCRIPTION
The PL602-35 (LVPECL with inverted OE), PL602-37
(LVCMOS), PL602-38 (LVPECL), and PL602-39
(LVDS) are high performance and low phase noise XO
IC chips. They provide phase noise performance as
low as 127dBc at 10kHz offset (at 155MHz), by multi-
plying the input crystal frequency up to 32x. The very
low jitter makes them ideal for a wide range of applica-
tions, including SONET/SDH and FEC. They accept
fundamental parallel resonant mode crystals from
12MHz to 25MHz.
BLOCK DIAGRAM
PIN CONFIGURATION
(Top View)
^: Internal pull-up
*: On QFN package, PL602-35/-38 do not have SEL0 available: Pin 10
is VDD, pin 11 is GND. However, PL 602 -37/ -39 have SEL0 (pin 10),
and pin11 i s VDD. See pin assignment ta ble for de tail s.
Note: On QFN package there is a lar ge center pad for thermal relief.
This pad nee ds to be connec ted to GND.
OUTPUT ENABLE LOGICAL LEVELS
Part #
OE
State
PL602-38
0 (Default)
Output enabled
1
Tri-state
PL602-35
PL602-37
PL602-39
0
Tri-state
1 (Default)
Output enabled
OE input: Logical sta tes defined by LVPECL levels for PL602-38
Logical sta tes defined by LVCMOS levels for PL602 -37/ -39
PL602-3x
1
2
3
4
5
6
7
8
VDD
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
XIN
XOUT
SEL3^
SEL2^
OE
GND
GND
SEL0^
SEL1^
GND
CLKC
VDD
CLKT
GND
GND
TSSOP-16L
PL602-3x
1 2 3 4
12 11 10 9
13
14
15
16
8
7
6
5
XIN
SEL0^ / VDD*
SEL1^
VDD / GND*
SEL3^
XOUT
SEL2^
OE
GND
GND
GND
GND
VDD
CLKT
CLKC
GND
QFN-16L
XIN
XOUT
OE
CLKT
PL602-3x
CLKC
PLL by-pass
SEL[3:0]
PLL
(Phase
Locked
Loop)
Oscillator
Amplifier
w/
integrated
load cap.
PL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC’s
Micrel Inc. 2 180 Fortune Drive San Jose, CA 95131 USA tel +1(408) 944 -0800 fax +1(408) 474-1000 www.micrel.com Rev 03/07/2 012 Page 2
FREQUENCY SELECTION TABLE
SEL3
SEL1
Selected Multiplier
0
1
Fin x 32
0
1
Fin / 8
0
1
Fin x 2
1
0
Fin / 2
1
1
Fin / 16
1
1
Fin x 4
1
0
Fin / 4
1
0
Fin x 8
1
1
Fin x 16
1
1
No multiplication
Note: SEL0 is not avail able (always 1) for PL602-35 and PL 602 -38 i n 3x3mm packa ge
PIN DESCRIPTIONS PL602-35 and PL602-38 (see next page for PL602-37/-39)
Name
TSSOP
Pin number
3x3mm QFN
Pin number
Type
Description
XIN
2
12
I
Crystal input (See Crystal Specification on page 4)
XOUT
3
13
I
Crystal output (See Crystal Specification on page 4)
OE
6
16
I
Output enable pin (See OE logic state table on page 1)
GND
7,8,9,10,14
1,2,3,4,8,11
P
Ground connection
CLKT
11
5
O
LVPECL True output
CLKC
13
7
O
LVPECL Complementary output
SEL0
16
Not available
I
Multiplier selector pins. These pins have an internal pull-
up that will default SEL to 1 when not connected to
GND.
SEL1
15
9
I
SEL2
5
15
I
SEL3
4
14
I
VDD
1, 12
6,10
P
+3.3V power supply.
PL602-35/-37/-38/-39
750kHz 800MHz Low Phase Noise Multiplier XO
Universal Low Phase Noise IC’s
Micrel Inc. 2 180 Fortune Drive San Jose, CA 95131 USA tel +1(408) 944 -0800 fax +1(408) 474-1000 www.micrel.com Rev 03/07/2 012 Page 3
PIN DESCRIPTIONS PL602-37/-39 (see previous page for PL602-35/-38)
Name
TSSOP
Pin number
3x3mm QFN
Pin number
Type
Description
XIN
2
12
I
Crystal input. See Crystal Specification on page 4.
XOUT
3
13
I
Crystal output. See Crystal Specification on page 4.
OE
6
16
I
Output enable pin (see OE logic state table on page 1).
GND
7,8,9,10,14
1,2,3,4,8
P
Ground.
CLKT
11
5
O
LVDS True output for PL602-39.
No Connect for PL602-37
CLKC
13
7
O
LVDS Complementary output for PL602-39
LVCMOS out for PL602-37
SEL0
16
10
I
Multiplier selector pins. These pins have an internal pull-up
that will default SELx to 1 when not connected to GND.
SEL1
15
9
I
SEL2
5
15
I
SEL3
4
14
I
VDD
1, 12
6,11
P
+3.3V power supply.

PL602-39QC-R

Mfr. #:
Manufacturer:
Description:
Standard Clock Oscillators XO Multiplier with LVPECL Output
Lifecycle:
New from this manufacturer.
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