74LVC257A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 28 November 2011 3 of 18
NXP Semiconductors
74LVC257A
Quad 2-input multiplexer with 5V tolerant; 3-state
5. Pinning information
5.1 Pinning
Fig 3. Functional diagram Fig 4. Logic diagram
mna868
3-STATE
MULTI-
PLEXER
OUTPUTS
SELECTOR
1Y
2Y
3Y
4Y
12
9
7
4
1I0
1I1
2I0
2I1
3I0
3I1
4I0
4I1
S
OE
13
1
15
14
10
11
6
5
3
2
1I0
OE
S
1I1
2I0
2I1
3I0
3I1
4I0
4I1
4Y
3Y
2Y
1Y
mna867
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration for SO24 and (T)SSOP24 Fig 6. Pin configuration for DHVQFN24
001aad098
257A
2Y 3I1
2I1 3I0
2I0 4Y
GND
(1)
1Y 4I1
1I1 4I0
1I0 OE
GND
3Y
S
V
CC
Transparent top view
7 10
6 11
5 12
4
13
3 14
2 15
8
9
1
16
terminal 1
index area
74LVC257A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 28 November 2011 4 of 18
NXP Semiconductors
74LVC257A
Quad 2-input multiplexer with 5V tolerant; 3-state
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high-impedance OFF-state
Table 2. Pin description
Symbol Pin Description
S 1 common data select input
1I0 2 data input from source 0
1I1 3 data input from source 1
1Y 4 3-state multiplexer output
2I0 5 data input from source 0
2I1 6 data input from source 1
2Y 7 3-state multiplexer output
GND 8 ground (0 V)
3Y 9 3-state multiplexer output
3I1 10 data input from source 1
3I0 11 data input from source 0
4Y 12 3-state multiplexer output
4I1 13 data input from source 1
4I0 14 data input from source 0
OE
15 3-state output enable input (active LOW)
V
CC
16 supply voltage
Table 3. Function table
[1]
Input Output
OE S nI0 nI1 nY
HXXXZ
LHXLL
LHXHH
LLLXL
LLHXH
74LVC257A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 28 November 2011 5 of 18
NXP Semiconductors
74LVC257A
Quad 2-input multiplexer with 5V tolerant; 3-state
7. Limiting values
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO16 packages: above 70 C the value of P
tot
derates linearly with 8 mW/K.
For (T)SSOP16 packages: above 60 C the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 C the value of P
tot
derates linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +6.5 V
I
IK
input clamping current V
I
< 0 50 - mA
V
I
input voltage
[1]
0.5 +6.5 V
I
OK
output clamping current V
O
> V
CC
or V
O
< 0 - 50 mA
V
O
output voltage HIGH or LOW state
[2]
0.5 V
CC
+ 0.5 V
output 3-state
[2]
0.5 +6.5 V
I
O
output current V
O
= 0 V to V
CC
- 50 mA
I
CC
supply current - 100 mA
I
GND
ground current 100 - mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation T
amb
= 40 C to +125 C
[3]
- 500 mW
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 1.65 - 3.6 V
functional 1.2 - - V
V
I
input voltage 0 - 5.5 V
V
O
output voltage HIGH or LOW state 0 - V
CC
V
3-state 0 - 5.5 V
T
amb
ambient temperature in free air 40 - +125 C
t/V input transition rise and fall
rate
V
CC
= 1.65 V to 2.7 V 0 - 20 ns/V
V
CC
= 2.7 V to 3.6 V 0 - 10 ns/V

74LVC257AD,118

Mfr. #:
Manufacturer:
Nexperia
Description:
Encoders, Decoders, Multiplexers & Demultiplexers 3.3V QUAD 2-1 MUX
Lifecycle:
New from this manufacturer.
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