OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LTC4269CDKD-1#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P44
LTC4269-1
31
42691fc
APPLICATIONS INFORMATION
If we wanted a V
IN
-referred trip point of 36V, with 1.8V
(5%) of hysteresis (on at 36V, off at 34.2V):
R
A
=
1.8V
3.4µA
= 529k, use 523k
R
B
=
523k
36V
1.23V
–1
⎛
⎝
⎜
⎞
⎠
⎟
= 18.5k, use 18.7k
Even with good board layout, board noise may cause
problems with UVLO. You can fi lter the divider but keep
large capacitance off the UVLO node because it will slow
the hysteresis produced from the change in bias current.
Figure 13c shows an alternate method of fi ltering by split-
ting the R
A
resistor with the capacitor. The split should put
more of the resistance on the UVLO side.
Converter Start-Up
The standard topology for the LTC4269-1 utilizes a third
transformer winding on the primary side that provides
both feedback information and local V
CC
power for the
LTC4269-1 (see Figure 14). This power bootstrapping
improves converter effi ciency but is not inherently self-
starting. Start-up is affected with an external “trickle charge”
resistor and the LTC4269-1’s internal V
CC
undervoltage
lockout circuit. The V
CC
undervoltage lockout has wide
hysteresis to facilitate start-up.
In operation, the trickle charge resistor, R
TR
, is connected
to V
IN
and supplies a small current, typically on the order
of 1mA to charge C
TR
. Initially the LTC4269-1 is off and
draws only its start-up current. When C
TR
reaches the V
CC
turn-on threshold voltage the LTC4269-1 turns on abruptly
and draws its normal supply current.
Switching action commences and the converter begins to
deliver power to the output. Initially the output voltage is
low and the fl yback voltage is also low, so C
TR
supplies
most of the LTC4269-1 current (only a fraction comes
from R
TR
.) V
CC
voltage continues to drop until, after
some time (typically tens of milliseconds) the output
voltage approaches its desired value. The fl yback winding
then provides the LTC4269-1 supply current and the V
CC
voltage stabilizes.
If C
TR
is undersized, V
CC
reaches the V
CC
turn-off threshold
before stabilization and the LTC4269-1 turns off. The V
CC
node then begins to charge back up via R
TR
to the turn-on
threshold, where the part again turns on. Depending upon
the circuit, this may result in either several on-off cycles
before proper operation is reached, or permanent relaxation
oscillation at the V
CC
node.
R
TR
is selected to yield a worst-case minimum charging
current greater than the maximum rated LTC4269-1 start-up
current, and a worst-case maximum charging current less
than the minimum rated LTC4269-1 supply current.
R
TR(MAX)
<
V
IN(MIN)
− V
CC(ON_MAX)
I
CC(ST _MAX)
and
R
TR(MIN)
>
V
IN(MAX)
− V
CC(ON_MIN)
I
CC(MIN)
Make C
TR
large enough to avoid the relaxation oscillatory
behavior described above. This is complicated to deter-
mine theoretically as it depends on the particulars of the
secondary circuit and load behavior. Empirical testing is
recommended. Note that the use of the optional soft-start
function lengthens the power-up timing and requires a
correspondingly larger value for C
TR
.
+
I
VCC
42691 F14
R
TR
C
TR
V
IN
V
IN
I
VCC
V
VCC
V
CC(ON)
THRESHOLD
0
V
PG
V
CC
LTC4269-1 PG
GND
•
•
•
Figure 14. Typical Power Bootstrapping
LTC4269-1
32
42691fc
The LTC4269-1 has an internal clamp on V
CC
of approxi-
mately 19.5V. This provides some protection for the part
in the event that the switcher is off (UVLO low) and the
V
CC
node is pulled high. If R
TR
is sized correctly, the part
should never attain this clamp voltage.
Control Loop Compensation
Loop frequency compensation is performed by connect-
ing a capacitor network from the output of the feedback
amplifi er (V
CMP
pin) to ground as shown in Figure 15.
Because of the sampling behavior of the feedback amplifi er,
compensation is different from traditional current mode
controllers. Normally only C
VCMP
is required. R
VCMP
can
be used to add a zero, but the phase margin improvement
traditionally offered by this extra resistor is usually already
accomplished by the nonzero secondary circuit impedance.
C
VCMP2
can be used to add an additional high frequency
pole and is usually sized at 0.1 times C
VCMP
.
Slope Compensation
The LTC4269-1 incorporates current slope compensation.
Slope compensation is required to ensure current loop
stability when the DC is greater than 50%. In some switching
regulators, slope compensation reduces the maximum peak
current at higher duty cycles. The LTC4269-1 eliminates
this problem by having circuitry that compensates for
the slope compensation so that maximum current sense
voltage is constant across all duty cycles.
Minimum Load Considerations
At light loads, the LTC4269-1 derived regulator goes into
forced continuous conduction mode. The primary-side
switch always turns on for a short time as set by the
t
ON(MIN)
resistor. If this produces more power than the
load requires, power will fl ow back into the primary dur-
ing the off period when the synchronization switch is on.
This does not produce any inherently adverse problems,
although light load effi ciency is reduced.
Maximum Load Considerations
The current mode control uses the V
CMP
node voltage
and amplifi ed sense resistor voltage as inputs to the
current comparator. When the amplifi ed sense voltage
exceeds the V
CMP
node voltage, the primary-side switch
is turned off.
In normal use, the peak switch current increases while
FB is below the internal reference. This continues until
V
CMP
reaches its 2.56V clamp. At clamp, the primary-side
MOSFET will turn off at the rated 100mV V
SENSE
level. This
repeats on the next cycle.
It is possible for the peak primary switch currents as
referred across R
SENSE
to exceed the max 100mV rating
because of the minimum switch on time blanking. If the
voltage on V
SENSE
exceeds 205mV after the minimum
turn-on time, the SFST capacitor is discharged, causing
the discharge of the V
CMP
capacitor. This then reduces
the peak current on the next cycle and will reduce overall
stress in the primary switch.
APPLICATIONS INFORMATION
17
R
VCMP
V
CMP
C
VCMP
42691 F15
C
VCMP2
Figure 15. V
CMP
Compensation Network
In further contrast to traditional current mode switchers,
V
CMP
pin ripple is generally not an issue with the LTC4269-1.
The dynamic nature of the clamped feedback amplifi er
forms an effective track/hold type response, whereby the
V
CMP
voltage changes during the fl yback pulse, but is then
held during the subsequent switch-on portion of the next
cycle. This action naturally holds the V
CMP
voltage stable
during the current comparator sense action (current mode
switching).
Application Note 19 provides a method for empirically
tweaking frequency compensation. Basically, it involves
introducing a load current step and monitoring the
response.
LTC4269-1
33
42691fc
Short-Circuit Conditions
Loss of current limit is possible under certain conditions
such as an output short-circuit. If the duty cycle exhibited
by the minimum on-time is greater than the ratio of
secondary winding voltage (referred-to-primary) divided
by input voltage, then peak current is not controlled at
the nominal value. It ratchets up cycle-by-cycle to some
higher level. Expressed mathematically, the requirement
to maintain short-circuit control is
DC
MIN
= t
ON(MIN)
•f
OSC
<
I
SC
•R
SEC
+R
DS(ON)
()
V
IN
•N
SP
where:
t
ON(MIN)
is the primary-side switch minimum on-time
I
SC
is the short-circuit output current
N
SP
is the secondary-to-primary turns ratio (N
SEC
/N
PRI
)
(other variables as previously defi ned)
Trouble is typically encountered only in applications with
a relatively high product of input voltage times secondary
to primary turns ratio and/or a relatively long minimum
switch on time. Additionally, several real world effects such
as transformer leakage inductance, AC winding losses and
output switch voltage drop combine to make this simple
theoretical calculation a conservative estimate. Prudent
design evaluates the switcher for short-circuit protection
and adds any additional circuitry to prevent destruction.
Output Voltage Error Sources
The LTC4269-1’s feedback sensing introduces additional
minor sources of errors. The following is a summary list:
• The internal bandgap voltage reference sets the reference
voltage for the feedback amplifi er. The specifi cations
detail its variation.
• The external feedback resistive divider ratio directly
affects regulated voltage. Use 1% components.
• Leakage inductance on the transformer secondary
reduces the effective secondary-to-feedback winding
turns ratio (NS/NF) from its ideal value. This increases
the output voltage target by a similar percentage. Since
secondary leakage inductance is constant from part to
part (within a tolerance) adjust the feedback resistor
ratio to compensate.
APPLICATIONS INFORMATION
• The transformer secondary current fl ows through the
impedances of the winding resistance, synchronous
MOSFET R
DS(ON)
and output capacitor ESR. The DC
equivalent current for these errors is higher than the
load current because conduction occurs only during
the converter’s off-time. So, divide the load current by
(1 – DC).
If the output load current is relatively constant, the feedback
resistive divider is used to compensate for these losses.
Otherwise, use the LTC4269-1 load compensation circuitry
(see Load Compensation). If multiple output windings are
used, the fl yback winding will have a signal that represents
an amalgamation of all these windings impedances. Take
care that you examine worst-case loading conditions when
tweaking the voltages.
Power MOSFET Selection
The power MOSFETs are selected primarily on the criteria of
on-resistance R
DS(ON)
, input capacitance, drain-to-source
breakdown voltage (BV
DSS
), maximum gate voltage (V
GS
)
and maximum drain current (ID
(MAX)
).
For the primary-side power MOSFET, the peak current is:
I
PK(PRI)
=
P
IN
V
IN(MIN)
•DC
MAX
•1+
X
MIN
2
⎛
⎝
⎜
⎞
⎠
⎟
where XMIN is peak-to-peak current ratio as defi ned
earlier.
For each secondary-side power MOSFET, the peak cur-
rent is:
I
PK(SEC)
=
I
OUT
1−DC
MAX
•1+
X
MIN
2
⎛
⎝
⎜
⎞
⎠
⎟
Select a primary-side power MOSFET with a BVDSS
greater than:
BV
DSS
≥I
PK
L
LKG
C
P
+ V
IN(MAX)
+
V
OUT(MAX)
N
SP
where NSP refl ects the turns ratio of that secondary-to
primary winding. LLKG is the primary-side leakage induc-
tance and CP is the primary-side capacitance (mostly from
the drain capacitance (COSS) of the primary-side power
MOSFET). A clamp may be added to reduce the leakage
inductance as discussed.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P44

LTC4269CDKD-1#TRPBF

Mfr. #:
Buy LTC4269CDKD-1#TRPBF
Manufacturer:
Analog Devices Inc.
Description:
Power Switch ICs - POE / LAN IEEE 802.3at High Power PD Controller with Flyback Switcher
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet