Philips Semiconductors Product specification
PCK2020
CK00 (100/133MHz) spread spectrum
differential system clock generator
2000 Nov 13
3
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
1 V
SS
Ref
2, 3
Ref0/MultSel0
Ref1/MultSel1
During power up, pins functions as a latched inputs that enables MULTSEL0 and
MULTSEL1 prior to the pins being used for output of 3 V at 14.318 MHz. Part must be
clocked to latch data in.
4 V
DD
3.3Ref
5 XTAL_IN Crystal input
6 XTAL_OUT Crystal output
7, 13, 19 V
SS
PCI
8, 9, 11, 12, 14, 15, 17,
18, 20, 21
PCICLK[0–9] 3.3 V PCI clock outputs fixed at 33 MHz.
10, 16, 22 V
DD
3.3PCI
23 SEL100/133 Select input pin for enabling 133 MHz or 100 MHz CPU outputs.
24 V
SS
USB
25, 26
48 MHz/SelA
48 MHz/SelB
3.3 V fixed 48 MHz clock outputs. During power up, pins functions as latched inputs
that enables SELA and SELB prior to the pins being used for output of 3 V at 48 MHz.
Part must be clocked to latch data in.
27 V
DD
3.3USB
28 PWRDWN Device enters power down mode when held low. Asserts low.
29, 36 V
DD
3.3
30, 31, 34, 35 3V66[0–3] 3.3 V fixed 66 MHz CPU clock outputs.
32, 33 V
SS
37 V
SS
Core
38 V
DD
3.3Core 3.3 V power supply for analog circuits.
39 I_REF
This pin controls the reference current for the host pairs. This pin requires a fixed
precision resistor tied to ground in order to establish the correct current.
40, 46 V
SS
CPU
41, 44, 47, 50 CPUCLK[0–3]
42, 45, 48, 51 CPUCLK[0–3]
43, 49 V
DD
3.3CPU
52 SPREAD
Enables spread spectrum mode when held low on differential host outputs,
MREF/MREF_B clocks, 66 MHz clocks, and 33 MHz PCI clocks. Asserts low.
53 V
SS
M
54 3VMref_b
3.3 V clock outputs running at 1/2 CPU clock frequency. 66 MHz or 50 MHz depending
on the state of input pin SEL133/100. (Out of phase with 3VMREF output).
55 3VMref
3.3 V clock outputs running at 1/2 CPU clock frequency. 66 MHz or 50 MHz depending
on the state of input pin SEL133/100.
56 V
DD
3.3M 3.3 V power supply
