2002-2012 Microchip Technology Inc. DS21459E-page 5
TC7129
2.0 PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Pin No.
40-Pin PDIP
Pin No.
44-Pin PQFP
Pin No.
44-Pin PLCC
Symbol Function
1 40 2 OSC1 Input to first clock inverter.
2 41 3 OSC3 Output of second clock inverter.
3 42 4 ANNUNCIATOR Backplane square wave output for driving annunciators.
443 5B
1
, C
1
, CONT Output to display segments.
544 6A
1
, G
1
, D
1
Output to display segments.
61 7F
1
, E
1
, DP
1
Output to display segments.
72 8B
2
, C
2
,
LO BATT
Output to display segments.
83 9A
2
, G
2
, D
2
Output to display segments.
9410F
2
, E
2
, DP
2
Output to display segments.
10 5 11 B
3
, C
3
, MINUS Output to display segments.
11 7 13 A
3
, G
3
, D
3
Output to display segments.
12 8 14 F
3
, E
3
, DP
3
Output to display segments.
13 9 15 B
4
, C
4
, BC
5
Output to display segments.
14 10 16 A
4
, D
4
, G
4
Output to display segments.
15 11 17 F
4
, E
4
, DP
4
Output to display segments.
16 12 18 BP
3
Backplane #3 output to display.
17 13 19 BP
2
Backplane #2 output to display.
18 14 20 BP
1
Backplane #1 output to display.
19 15 21 V
DISP
Negative rail for display drivers.
20 16 22 DP
4
/OR Input: When high, turns on most significant decimal point.
Output: Pulled high when result count exceeds ±19,999.
21 18 24 DP
3
/UR Input: Second-most significant decimal point on when high.
Output: Pulled high when result count is less than ±1000.
22 19 25 LATCH
/HOLD Input: When floating, ADC operates in Free Run mode. When
pulled high, the last displayed reading is held. When pulled low,
the result counter contents are shown incrementing during the
de-integrate phase of cycle.
Output: Negative going edge occurs when the data latches are
updated. Can be used for converter status signal.
23 20 26 V– Negative power supply terminal.
24 21 27 V+ Positive power supply terminal and positive rail for display
drivers.
25 22 28 INT IN Input to integrator amplifier.
26 23 29 INT OUT Output of integrator amplifier.
27 24 30 CONTINUITY Input: When low, continuity flag on the display is off. When high,
continuity flag is on.
Output: High when voltage between inputs is less than +200 mV.
Low when voltage between inputs is more than +200 mV.
28 25 31 COMMON Sets common mode voltage of 3.2V below V+ for DE, 10X, etc.
Can be used as pre-regulator for external reference.
29 26 32 C
REF
+ Positive side of external reference capacitor.
30 27 33 C
REF
– Negative side of external reference capacitor.
31 29 35 BUFFER Output of buffer amplifier.
32 30 36 IN LO Negative input voltage terminal.
33 31 37 IN HI Positive input voltage terminal.
34 32 38 REF HI Positive reference voltage.
35 33 39 REF LO Negative reference voltage
