MP2317 – 26V, 1A, SYNCHRONOUS, STEP-DOWN CONVERTER
MP2317 Rev. 1.0 www.MonolithicPower.com 10
3/24/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
OPERATION
The MP2317 is a high-frequency, synchronous,
rectified, step-down, switch-mode converter
with built-in, internal power MOSFETs. It offers
a very compact solution that achieves 1A of
continuous output current with excellent load
and line regulation over a wide input supply
range.
The MP2317 operates in a fixed-frequency,
peak-current-control mode to regulate the
output voltage. A pulse width modulation
(PWM) cycle is initiated by the internal clock.
The integrated high-side power MOSFET (HS-
FET) turns on and remains on until its current
reaches the value set by the COMP voltage
(V
COMP
). When the power switch is off, it
remains off until the next clock cycle begins. If
the current in the power MOSFET does not
reach the current value set by COMP within
93% of one PWM period, the power MOSFET is
forced off.
Internal VCC Regulator
Most of the internal circuitries are powered by
the internal VCC regulator. This regulator takes
the V
IN
input and operates in the full V
IN
range.
When V
IN
is greater than its UVLO rising
threshold, the output of the regulator is in full
regulation. When V
IN
is lower than its UVLO
falling threshold, the internal VCC regulator
shuts off. A 0.1µF ceramic capacitor is required
for decoupling.
Error Amplifier (EA)
The error amplifier compares the FB voltage
with the internal 0.791V reference (REF) and
outputs a COMP voltage, which is used to
control the power MOSFET current. The
optimized internal compensation network
minimizes the external component counts and
simplifies the control loop design.
AAM Operation
The MP2317 uses advanced asynchronous
modulation (AAM) power-save mode for light
loads. The AAM voltage is set at 0.4V internally.
Under heavy-load conditions, V
COMP
is higher
than V
AAM
. When the clock goes high, the HS-
FET turns on and remains on until V
ILsense
reaches the value set by V
COMP
. The internal
clock resets whenever V
COMP
is higher than
V
AAM
.
Under light-load conditions, the value of V
COMP
is low. When V
COMP
is less than V
AAM
, and V
FB
is
less than V
REF
, V
COMP
ramps up until it exceeds
V
AAM
. During this time, the internal clock is
blocked, and the MP2317 skips some pulses for
pulse frequency modulation (PFM) mode and
achieves light-load power save.
Figure 2: Simplified AAM Control Logic
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) is implemented
to protect the chip from operating at an
insufficient supply voltage. The UVLO
comparator monitors the input voltage. When
the input voltage is higher than the UVLO rising
threshold, the MP2317 powers up and shuts off
when the input voltage is lower than the UVLO
falling threshold. It has non-latch protection.
Internal Soft Start (SS)
The soft start (SS) is implemented to prevent
the converter output voltage from overshooting
during start-up. When the chip starts up, the
internal circuitry generates a soft-start voltage
that ramps up from 0V. The soft-start period
lasts until the voltage on the soft-start capacitor
exceeds the 0.791V reference voltage. At this
point, the reference voltage takes over. The
soft-start time is set to be around 1.5ms
internally from 10% to 90% of V
OUT
.
Over-Current Protection (OCP) and Hiccup
The MP2317 employs a cycle-by-cycle over-
current limit when the inductor current peak
value exceeds the set current-limit threshold.
Meanwhile, the output voltage starts to drop
until FB is below the under-voltage (UV)
threshold, typically 50% below the reference.
Once UV is triggered, the MP2317 enters
hiccup mode to restart the part periodically.
This protection mode is especially useful when
the output is dead-shorted to ground. The
average short-circuit current is greatly reduced
to alleviate thermal issues and to protect the
regulator. The MP2317 exits hiccup mode once
the over-current condition is removed.
