PIC18F24K20/25K20/44K20/45K20
DS80000425P-page 6 2008-2015 Microchip Technology Inc.
14. Module: Internal Fixed Voltage Reference
(FVR)
The FVRST bit of the CVRCON2 register activates
prematurely (Rev. A4 and A7 only).
Work around
Wait an additional 20 µs after FVRST is sensed
high before using the fixed voltage reference.
Enable the FVR by setting the FVREN bit of the
CVRCON2 register before activating any
peripheral that automatically enables the FVR.
Peripherals that automatically enable the FVR
include the Brown-out Reset, the High/Low-
Voltage Detect, and the HFINTOSC.
Affected Silicon Revisions
15. Module: High Low Voltage Detect (HLVD)
The IVRST bit of the HLVDCON register activates
prematurely (Rev. A4 and A7 only).
Work around
Wait an additional 20 µs after IVRST is sensed
high before using the fixed voltage reference.
Enable the FVR by setting the FVREN bit of the
CVRCON2 register before activating any
peripheral that automatically enables the FVR.
Peripherals that automatically enable the FVR
include the Brown-out Reset, the High/Low-
Voltage Detect, and the HFINTOSC.
Affected Silicon Revisions
16. Module: BOR
An unexpected Brown-out Reset may occur when
the fixed voltage reference is inactive and BOR is
activated, thereby activating the fixed voltage ref-
erence simultaneously. This error is caused by a
premature FVRST stable flag (Rev. A4 and A7
only) and only affects Brown-out disable in Sleep
and software enabled BOR modes.
Work around
Enable the FVR by setting the FVREN bit of the
CVRCON2 register and then wait an additional 20
µs after FVRST is sensed high before enabling
BOR. Brown-out disable in Sleep mode with
automatic enable on wake-up cannot be used.
Affected Silicon Revisions
17. Module: System Clocks
HFINTOSC output frequency is 16 MHz ±3%,
25°C to 85°C.
Work around
None.
Affected Silicon Revisions
18. Module: POR/BOR
The POR rearm voltage may be below the low end
of the BOR range, causing unexpected code
execution below the BOR range.
Work around
Use external power monitor to hold the device in
Reset below 1.1V.
Affected Silicon Revisions
0xA
0xC
0xE
0x11
0x16
0x18
0x19
0x1B
0x1C
XX
0xA
0xC
0xE
0x11
0x16
0x18
0x19
0x1B
0x1C
XX
0xA
0xC
0xE
0x11
0x16
0x18
0x19
0x1B
0x1C
XX
0xA
0xC
0xE
0x11
0x16
0x18
0x19
0x1B
0x1C
XXXX
0xA
0xC
0xE
0x11
0x16
0x18
0x19
0x1B
0x1C
XXXX