2008-2015 Microchip Technology Inc. DS80000425P-page 11
PIC18F24K20/25K20/44K20/45K20
39. Module: Wake-up from Low-Power Sleep
mode
The device may not wake from Sleep when both of
the following conditions are met:
1. The device is in Sleep mode for <1 ms;
2. On waking, the device executes a SLEEP
instruction within 100 µs.
Under these conditions, the oscillator may stop
before completing execution of the SLEEP
instruction. The device will enter Sleep mode but
will not wake-up on any enabled wake-up event,
including the Watchdog Timer.
Work around
1. Disable High-Speed Start-up
Disabling High-Speed Start-up in the Configuration
Word will delay the device executing code on
wake-up by 250 µs, nominally, allowing the
oscillator to stabilize.
The wake-up time from Sleep will increase by
about 250 µs, nominally.
2. BOR enabled during Sleep
Configuring the device for hardware only BOR or
software-controlled BOR and enabling SBOREN,
the voltage reference is on during Sleep.
The device will wake-up and the oscillator will be
stable. This will add 20 µA (nominal) to the Sleep
current.
3. Enable the FVR during Sleep
In the same manner as the BOR, the FVR will keep
the voltage reference on during Sleep, causing the
oscillator to be stable on wake-up.
4. Avoid executing SLEEP within 100 µs of any
wake-up event
This can be achieved by adding more instructions
(NOP) before executing the SLEEP instruction. This
minimizes the probability of the SLEEP instruction
only partially executing.
Affected Silicon Revisions
40. Module: Low-Voltage Detect
If Low-Voltage Detect is enabled, the band gap is
disabled in Sleep, and the part is put to Sleep for a
short period of time, the LVD will trigger
immediately upon waking-up from Sleep.
Work around
Do not disable the band gap in Sleep when using
the LVD.
Affected Silicon Revisions
41. Module: Timer1/3
When Timer1 or Timer3 is operated in
Asynchronous External Input mode, unexpected
interrupt flag generation may occur if an external
clock edge arrives too soon following a firmware
write to the TMRxH:TMRxL registers. An
unexpected interrupt flag event may also occur
when enabling the module or switching from
Synchronous to Asynchronous mode.
Work around
This issue only applies when operating the timer
in Asynchronous mode. Whenever possible,
operate the timer module in Synchronous mode
to avoid spurious timer interrupts.
If Asynchronous mode must be used in the
application, potential strategies to mitigate the
issue may include any of the following:
• Design the firmware so it does not rely on
the TMRxIF flag or keep the respective
interrupt disabled. The timer still counts
normally and does not reset to 0x0000
when the spurious interrupt flag event is
generated.
• Design the firmware so that it does not
write to the TMRxH:TMRxL registers or
does not periodically disable/enable the
timer, or switch modes. Reading from the
timer does not trigger the spurious interrupt
flag events.
• If the firmware must use the timer inter-
rupts and must write to the timer (or dis-
able/enable, or mode switch the timer),
implement code to suppress the spurious
interrupt event, should it occur. This can be
achieved by following the process shown in
Example 1.
0xA
0xC
0xE
0x11
0x16
0x18
0x19
0x1B
0x1C
XXXXXXXXX
0xA
0xC
0xE
0x11
0x16
0x18
0x19
0x1B
0x1C
XXXXXXXXX
