SI51218-A07777-GM

3. Electrical Specifications
Table 3.1. DC Electrical Specifications
(V
DD
= 2.5 V ±10%, or V
DD
= 3.3V ±-10%, V
DDO
= V
DD
, C
L
= 10 pF, T
A
= –40 to 85 °C)
Parameter Symbol Test Condition Min Typ Max Unit
Operating Voltage V
DD
V
DD
= 3.3 V ± 10% 2.97 3.3 3.63 V
V
DD
= 2.5 V ± 10% 2.25 2.5 2.75 V
V
DDO
V
DDO
< V
DD
1.71 3.6 V
Output High Voltage V
OH
I
OH
= –4 mA
V
DDX
= V
DD
or V
DDO
V
DDX
0.5
V
Output Low Voltage V
OL
I
OL
= 4 mA 0.3 V
Input High Voltage V
IH
CMOS Level 0.7 V
DD
V
Input Low Voltage V
IL
CMOS Level 0.3 V
DD
V
Operating Supply Current
1
I
DD
F
IN
= 20 MHz, CLKOUT1 = 32.768
kHz, REFOUT2 = 20 MHz,
CLKOUT3 = 26 MHz, C
L
= 5 pF,
V
DD
= V
DDO
= 3.3 V
7.6 9 mA
Nominal Output Impedance Z
O
30 Ω
Internal Pull-up/Pull-down Resistor R
PUP
/R
PD
Pin 6 150k Ω
Input Pin Capacitance C
IN
Input pin capacitance 3 5 pF
Load Capacitance C
L
10 pF
Note:
1. I
DD
depends on input and output frequency configurations.
Table 3.2. AC Electrical Specifications
(V
DD
= 2.5 V ±10%, or V
DD
= 3.3 V ±10%, V
DDO
= V
DD
, C
L
= 10 pF, T
A
= –40 to 85 °C)
Parameter Symbol Condition Min Typ Max Unit
Input Frequency Range F
IN1
Crystal input 8 48 MHz
Input Frequency Range F
IN2
Reference clock Input 3 165 MHz
Output Frequency Range F
OUT
CLKOUT1: 32.768 kHz to 170 MHz
CLKOUT2/3: 3 MHz to 170 MHz
0.032768 170 MHz
Frequency Accuracy F
ACC
Configuration dependent 0 ppm
Output Duty Cycle DC
OUT
Measured at V
DDO
/2
F
OUT
< 75 MHz
45 50 55 %
Measured at V
DDO
/2
F
OUT
> 75 MHz
40 50 60 %
Input Duty Cycle DC
IN
CLKIN, CLKOUT through PLL 30 50 70 %
Si51218 Data Sheet
Electrical Specifications
silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 3
Parameter Symbol Condition Min Typ Max Unit
Output Rise/Fall Time t
r
/t
f
C
L
= 10 pF, 20 to 80% 1 2 ns
Period Jitter PJ
1
CLKOUT1/2/3, at the same fre-
quency
12 20 ps rms
PJ
2
CLKOUT1/2/3, at different output
frequencies
1
30
95
2
ps rms
PJ
3
CLKOUT1/3 at 32.768 kHz, V
DD
=
V
DDO
= 3.3 V
1500
2
ps
Cycle-to-Cycle Jitter CCJ
1
CLKOUT1/2/3, at the same fre-
quency
85 150 ps
CCJ
2
CLKOUT1/2/3, at different output
frequencies
1
145
290
2
ps
Power-up Time t
PU
Time from 0.9 V
DD
to valid
frequencies at all clock outputs
1.2 5 ms
Output Enable Time t
OE
Time from OE rising edge to active
at outputs SSCLK1/2 (asynchro-
nous), F
OUT
= 133 MHz
15 ns
Output Disable Time t
OD
Time from OE falling edge to active
at outputs SSCLK1/2 (asynchro-
nous), F
OUT
= 133 MHz
15 ns
Note:
1. Example frequency configurations:
8 MHz, 100 MHz, 75 MHz
48 MHz, 100 MHz, 66 2/3 MHz
96 MHz, 133 1/3 MHz, 133 1/3 MHz
2. Jitter performance depends on configuration and programming parameters.
Table 3.3. Absolute Maximum Conditions
Parameter Symbol Condition Min Typ Max Unit
Main Supply Voltage V
DD_3.3V
–0.5 4.2 V
Input Voltage V
IN
Relative to V
SS
–0.5 V
DD
+0.5 V
Temperature, Storage T
S
Non-functional –65 150 °C
Temperature, Operating Ambient T
A
Functional, I-Grade –40 85 °C
Temperature, Junction T
J
Functional, power is applied 125 °C
Temperature, Soldering T
Sol
Non-functional 260 °C
ESD Protection (Human Body Mod-
el)
ESD
HBM
JEDEC (JESD 22-A114) –4000 4000 V
ESD Protection (Charge Device
Model)
ESD
CDM
JEDEC (JESD 22-C101) –1500 1500 V
ESD Protection (Machine Model) ESD
MM
JEDEC (JESD 22-A115) –200 200 V
Note:
1. While using multiple power supplies, the voltage on any input or I/O pin cannot exceed the power pin during power-up. Power
supply sequencing is not required.
Si51218 Data Sheet
Electrical Specifications
silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 4
Table 3.4. Thermal Characteristics
Parameter Symbol Condition Value Unit
Thermal Resistance Junction to Ambient θ
JA
Still air 170.8 °C/W
Thermal Resistance Junction to Case θ
JC
Still air V
DD
+0.5 °C/W
Si51218 Data Sheet
Electrical Specifications
silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 5

SI51218-A07777-GM

Mfr. #:
Manufacturer:
Silicon Labs
Description:
3-OUTPUT PROGRAMMABLE CLOCK GEN
Lifecycle:
New from this manufacturer.
Delivery:
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