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SI51218-A07980-GMR

P1-P3P4-P6P7-P9P10-P12P13-P15
7. Package Outline
Figure 7.1. 8-pin TDFN
Table 7.1. Si51218 Package Dimensions
Dimension Min Nom Max
A 0.70 0.75 0.80
A1 0.00 0.02 0.05
A3 0.20 REF
b 0.15 0.20 0.25
D 1.60 BSC
D2 1.00 1.05 1.10
e 0.40 BSC
E 1.40 BSC
E2 0.20 0.25 0.30
L 0.30 0.35 0.40
aaa 0.10
bbb 0.10
ccc 0.10
ddd 0.07
eee 0.08
Si51218 Data Sheet
Package Outline
silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 9
Dimension Min Nom Max
Note:
1. All dimensions shown are in millimeters (mm) unless otherwise noted..
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.
Si51218 Data Sheet
Package Outline
silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 10
8. PCB Land Pattern
The figure below illustrates the PCB land pattern details for the device. The table below lists the values for the dimensions shown in the
illustration.
Figure 8.1. Si51218 8-pin TDFN PCB Land Pattern
Table 8.1. PCB Land Pattern Dimensions
Dimension mm
C 1.40
E 0.40
X1 0.75
Y1 0.20
X2 0.25
Y2 1.10
Si51218 Data Sheet
PCB Land Pattern
silabs.com | Smart. Connected. Energy-friendly. Rev. 1.1 | 11
P1-P3P4-P6P7-P9P10-P12P13-P15

SI51218-A07980-GMR

Mfr. #:
Buy SI51218-A07980-GMR
Manufacturer:
Silicon Labs
Description:
3-OUTPUT PROGRAMMABLE CLOCK GEN
Lifecycle:
New from this manufacturer.
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