www.pericom.com | 1-408-435-0800
Features
• PCIe
®
2.0 Compatible
• Two 5.0Gbps
signal pairs
• Adjustable Receiver Equalization
• 100Ω
CML I/O’s
• Pin Output Emphasis Control
• Input signal level detect and squelch for each channel
• Automatic Receiver Detect with digital enable/disable
• Electrical Idle fully supported
• Low Power (220mW) using 1.2V supply
• Stand-by Mode – Power Down State
• Single Supply Voltage: 1.2V or 3.3V
• Packaging: 20-TQFN (4x4mm)
Pericom Semiconductor’s PI3EQX5701 is a low power, high
performance 5.0 Gbps signal ReDriver™ designed
for the
PCIe
® 2.0 protocol. device provides programmable equalization,
De-Emphasis, and input threshold controls to optimize performance
over a variety of physical mediums by reducing Inter-Symbol
Interference. PI3EQX5701 supports two 100Ω
CML data
I/O’s between the Protocol ASIC to a switch fabric, over cable, or to
extend the signals across other distant data pathways on the user’s
platform.
integrated equalization circuitry provides
with signal integrity of the signal before the ReDriver. A low-level
input signal detection and output squelch function is provided for
each channel. Each channel operates fully independently. When the
channels are enabled (EN_x#=0) and operating, that channels’ input
signal level (on xI+/-) determines whether the output is active. If the
input signal level of the channel falls below the active th
reshold level
(Vth-) then the outputs are driven to the common mode voltage. In
addition to signal conditioning, when both EN_x#=1, the device enters
a low power standby mode.
PI3EQX5701 also includes a fully
programmable receiver detect function. When the RxDet pin is pulled
high, automatic receiver detection will be active.
PI3EQX5701
5.0Gbps, 1-lane, PCIe® 2.0 ReDriver™ with Digital Configuration
New Product Databrief
PCIe 2.0 signals must not only run reliably over varying lengths of
cable but also across multiple connectors and traces between the
transmitter and receiver.
Redrivers with emphasis and equalization signal conditioning
technology ensure the integrity of high-frequency PCIe 2.0 signals
by opening closed signal eyes to recover data and meet strict
compliance testing requirements. Increased signal margin also
supports longer drive lengths over even low-quality cables.
