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DG413DY+T

P1-P3P4-P6P7-P9P10-P12
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
_______________________________________________________________________________________ 7
t
r
< 20ns
t
f
< 20ns
50%
0V
LOGIC
INPUT
V-
-15V
R
L
300Ω
D1
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
S (
R
L
)
R
L
+ R
DS(ON)
SWITCH
INPUT
IN1
+3V
t
OFF
0V
SWITCH OUTPUT
0.9 x V
OUT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V
L
V+
C
L
35pF
+5V
+15V
V
OUT
S1
0V
REPEAT TEST FOR IN AND S, FOR LOAD
CONDITIONS, SEE Electrical Characteristics.
DG411
DG412
DG413
50%
0.9 x V
OUT1
+3V
0V
0V
LOGIC
INPUT
SWITCH
OUTPUT 2
(V
O2
)
0V
0.9 x V
OUT2
t
D
t
D
LOGIC
INPUT
V-
-15V
R
L2
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
S2
IN
V
L
S1
V
OUT2
V+
+5V
+15V
C
L2
V
S1
= +10V
V
S2
= +10V
R
L1
V
OUT1
C
L1
R
L
= 300Ω
C
L
= 35pF
D1
D2
SWITCH
OUTPUT 1
(V
O1
)
DG413
Figure 2. Switching-Time
Figure 3. DG413 Break-Before-Make
______________________________________________Timing Diagrams/Test Circuits
V
GEN
GND
D
C
L
V
OUT
-15V
V-
V+
V
OUT
IN
OFF
ON
OFF
ΔV
OUT
Q = (ΔV
OUT
)(C
L
)
S
+5V
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
V
IN
= +3V
+15V
R
GEN
IN
V
L
DG411
DG412
DG413
Figure 4. Charge-Injection
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
8 _______________________________________________________________________________________
Figure 6. Crosstalk
IN
0V or
2.4V
SIGNAL
GENERATOR
+15V
C
V
L
ANALYZER
D
R
L
GND
S
C
-15V
V-
+5V
V+
DG411
DG412
DG413
SIGNAL
GENERATOR 0dBm
+15V
C
ANALYZER
D
R
L
GND
S
C
V-
-15V
0V or 2.4V
IN1
D
50Ω
V
L
S
+5V
IN2
0V or 2.4V
V+
DG411
DG412
DG413
Figure 5. Off-Isolation
_________________________________Timing Diagrams/Test Circuits (continued)
CAPACITANCE
METER
D
S
GND
C
V-
-15V
IN
0V or
2.4V
C
+15V
V
L
+5V
f = 1MHz
V+
DG411
DG412
DG413
CAPACITANCE
METER
D
S
GND
C
V-
-15V
IN
0V or
2.4V
C
+15V
V
L
+5V
f = 1MHz
V+
DG411
DG412
DG413
Figure 7. Channel Off-Capacitance
Figure 8. Channel On-Capacitance
DG411/DG412/DG413
Improved, Quad,
SPST Analog Switches
_______________________________________________________________________________________ 9
Ordering Information (continued) Chip Topography
S3
S4
D3
0.097"
(2.46mm)
0.080"
(2.03mm)
V-
GND
D4
IN4
IN3
V
L
V+
S2
D1 IN1 IN2
S1
D2
†
Contact factory for dice specifications.
*
EP = Exposed pad.
**
Contact factory for availability and processing to MIL-STD-883B.
***
Contact factory for availability.
PART TEMP RANGE PIN-PACKAGE
DG411EGE -40°C to +85°C 16 QFN-EP*
DG411DJ -40°C to +85°C 16 Plastic DIP
DG411DY -40°C to +85°C 16 Narrow SO
DG411DK -40°C to +85°C 16 CERDIP
DG411AK
-55°C to +125°C
16 CERDIP**
DG411MY/PR
-55°C to +125°C
16 SO***
DG411MY/PR-T
-55°C to +125°C
16 SO***
DG412CJ 0°C to +70°C 16 Plastic DIP
DG412CUE 0°C to +70°C 16 TSSOP
DG412EUE -40°C to +85°C 16 TSSOP
DG412CY 0°C to +70°C 16 Narrow SO
DG412C/D 0°C to +70°C Dice†
DG412DJ -40°C to +85°C 16 Plastic DIP
DG412EGE -40°C to +85°C 16 QFN-EP*
DG412DY -40°C to +85°C 16 Narrow SO
DG412DK -40°C to +85°C 16 CERDIP
DG412AK
-55°C to +125°C
16 CERDIP**
DG412MY/PR
-55°C to +125°C
16 SO***
DG412MY/PR-T
-55°C to +125°C
16 SO***
DG413CJ 0°C to +70°C 16 Plastic DIP
DG413CUE 0°C to +70°C 16 TSSOP
DG413EUE -40°C to +85°C 16 TSSOP
DG413CY 0°C to +70°C 16 Narrow SO
DG413C/D 0°C to +70°C Dice†
DG413EGE -40°C to +85°C 16 QFN-EP*
DG413DJ -40°C to +85°C 16 Plastic DIP
DG413DY -40°C to +85°C 16 Narrow SO
DG413DK -40°C to +85°C 16 CERDIP
DG413AK
-55°C to +125°C
16 CERDIP**
P1-P3P4-P6P7-P9P10-P12

DG413DY+T

Mfr. #:
Buy DG413DY+T
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs Quad SPST Open/Closed
Lifecycle:
New from this manufacturer.
Delivery:
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