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PHD55N03LTA,118

P1-P3P4-P6P7-P9P10-P12P13-P14
Philips Semiconductors
PHP/PHB/PHD55N03LTA
TrenchMOS™ Logic Level FET
Product data Rev. 04 — 4 September 2002 4 of 14
9397 750 10143
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
7. Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-mb)
thermal resistance from junction to mounting base Figure 4 - - 1.75 K/W
R
th(j-a)
thermal resistance from junction to ambient
SOT78 vertical in still air - 60 - K/W
SOT428 SOT428 minimum footprint;
mounted on a PCB
- 75 - K/W
SOT404 and SOT428 SOT404 minimum footprint;
mounted on a PCB
- 50 - K/W
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
03ae63
10
-2
10
-1
1
10
10
-5
10
-4
10
-3
10
-2
10
-1
1
t
p
(s)
Z
th(j-mb)
(K/W)
single pulse
δ = 0.5
0.2
0.1
0.05
0.02
t
p
t
p
T
P
t
T
δ =
Philips Semiconductors
PHP/PHB/PHD55N03LTA
TrenchMOS™ Logic Level FET
Product data Rev. 04 — 4 September 2002 5 of 14
9397 750 10143
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
8. Characteristics
Table 5: Characteristics
T
j
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
drain-source breakdown voltage I
D
= 0.25 mA; V
GS
=0V
T
j
=25°C 25--V
T
j
= −55 °C 22--V
V
GS(th)
gate-source threshold voltage I
D
= 1 mA; V
DS
=V
GS
; Figure 9
T
j
=25°C 1 1.5 2 V
T
j
= 175 °C 0.5 - - V
T
j
= −55 °C - - 2.3 V
I
DSS
drain-source leakage current V
DS
=25V; V
GS
=0V
T
j
=25°C - 0.05 10 µA
T
j
= 175 °C - - 500 µA
I
GSS
gate-source leakage current V
GS
= ±5 V; V
DS
= 0 V - 10 100 nA
R
DSon
drain-source on-state resistance V
GS
=5V; I
D
=25A;Figure 7 and 8
T
j
=25°C - 15 18 mΩ
T
j
= 175 °C - 25.5 30.6 mΩ
V
GS
= 10 V; I
D
=25A
T
j
=25°C - 11 14 mΩ
Dynamic characteristics
g
fs
forward transconductance V
DS
=25V; I
D
=25A - 32 - S
Q
g(tot)
total gate charge I
D
= 55 A; V
DD
=15V; V
GS
=5V;Figure 13 -20-nC
Q
gs
gate-source charge - 8 - nC
Q
gd
gate-drain (Miller) charge - 7 - nC
C
iss
input capacitance V
GS
=0V; V
DS
= 25 V; f = 1 MHz; Figure 11 - 950 - pF
C
oss
output capacitance - 340 - pF
C
rss
reverse transfer capacitance - 230 - pF
t
d(on)
turn-on delay time V
DD
=15V; I
D
= 55 A; V
GS
= 10 V; R
G
=5Ω - 8 15 ns
t
r
rise time - 4580ns
t
d(off)
turn-off delay time - 45 80 ns
t
f
fall time - 4060ns
Source-drain diode
V
SD
source-drain (diode forward) voltage I
S
= 25 A; V
GS
=0V;Figure 12 - 0.95 1.2 V
I
S
=55A;V
GS
= 0 V - 1.2 - V
Philips Semiconductors
PHP/PHB/PHD55N03LTA
TrenchMOS™ Logic Level FET
Product data Rev. 04 — 4 September 2002 6 of 14
9397 750 10143
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
T
j
=25°CT
j
=25°C and 175 °C; V
DS
>I
D
xR
DSon
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
T
j
=25°C
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
03ae65
0
20
40
60
0 0.5 1 1.5 2
V
DS
(V)
I
D
(A)
3 V
5 V
T
j
= 25
°
C
V
GS
= 2.5 V
10 V
3.5 V
4 V
4.5 V
03ae67
0
20
40
60
012345
V
GS
(V)
I
D
(A)
V
DS
> I
D
x R
DSon
T
j
= 25
°
C 175
°
C
03ae66
0
0.01
0.02
0.03
0204060
I
D
(A)
R
DSon
(Ω)
4.5 V
V
GS
= 4 VT
j
= 25
°
C
5V
10 V
03ad57
0
0.5
1
1.5
2
-60 0 60 120 180
T
j
(
°
C)
a
a
R
DSon
R
DSon 25 C
°
()
----------------------------
=
P1-P3P4-P6P7-P9P10-P12P13-P14

PHD55N03LTA,118

Mfr. #:
Buy PHD55N03LTA,118
Manufacturer:
NXP Semiconductors
Description:
MOSFET N-CH 25V 55A DPAK
Lifecycle:
New from this manufacturer.
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