MAX4754/MAX4754A/MAX4755/MAX4756/MAX4756A
0.5
Ω
, Quad SPDT Switches in UCSP/QFN
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Detailed Description
The MAX4754/MAX4754A/MAX4755/MAX4756/MAX4756A
low on-resistance analog switches operate from a single
+1.8V to +5.5V supply. The devices are fully specified
for nominal 3V applications.
The MAX4754/MAX4754A DPDT switch have two logic
control inputs with each input controlling two SPDT
switches. Each switch has a 0.5Ω on-resistance in the
NO and NC terminals making it ideal for switching
audio signals.
The MAX4755 DPDT switch also has four 0.5Ω SPDT
switches with the switch pairs 1 and 2 adding an 11.5Ω
series resistor to the NC terminal. This feature allows
the user to drive an 8Ω speaker as a 32Ω load, allowing
it to be used as an ear speaker. Two logic control
inputs are used to control the four switches.
The MAX4756/MAX4756A has four 0.5Ω SPDT switches
controlled by one logic control input (INA) and EN input
to disable the switches.
Applications Information
Digital Control Inputs
The MAX4754/MAX4754A/MAX4755/MAX4756/MAX4756A
logic inputs accept up to +5.5V regardless of the sup-
ply voltage. For example, with a +3.3V supply IN_ can
be driven low to GND and high to +5.5V, which allows
mixed logic levels in a system. Driving the control logic
inputs rail-to-rail also minimizes power consumption.
For a +3V supply voltage, the logic thresholds are 0.5V
(low) and 1.4V (high).
For the MAX4756/MAX4756A, drive EN low to enable the
COM_. When EN is high, COM _ is high impedance.
Analog Signal Levels
Analog signal inputs over the full voltage range (0V to
V+) are passed through the switch with minimal change
in on-resistance (see the Typical Operating Charac-
teristics). The switches are bidirectional so NO_, NC_,
and COM_ can be either inputs or outputs.
Power-Supply Bypassing
Power-supply bypassing improves noise margin and pre-
vents switching noise from propagating from the V+ sup-
ply to other components. A 0.1µF capacitor connected
from V+ to GND is adequate for most applications.
UCSP Applications Information
For the latest application details on UCSP construction,
dimensions, tape carrier information, printed circuit
board techniques, bump-pad layout, and recommend-
ed reflow temperature profile, as well as the latest infor-
mation on reliability testing results, go to the Maxim
website at www.maxim-ic.com/ucsp for the Application
Note: UCSP—A Wafer-Level Chip-Scale Package.
