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MAX4754ETE+T

P1-P3P4-P6P7-P9P10-P12P13-P15
MAX4754/MAX4754A/MAX4755/MAX4756/MAX4756A
0.5
Ω
, Quad SPDT Switches in UCSP/QFN
10 ______________________________________________________________________________________
Timing Circuits/Timing Diagrams
t
r
< 5ns
t
f
< 5ns
50%
0V
LOGIC
INPUT
R
L
COM_
GND
IN_
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
N_ (
R
L
)
R
L
+ R
ON
V
N_
V+
t
OFF
0V
NO_
OR NC_
0.9 x V
0UT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
V+
C
L
V+
V
OUT
MAX4754/MAX4754A
MAX4755/MAX4756/
MAX4756A
50%
Figure 1. Switching Time
50%
V+
0V
LOGIC
INPUT
V
OUT
0.9 x V
OUT
t
BBM
LOGIC
INPUT
R
L
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_
IN_
NC_
V
OUT
V+
V+
C
L
V
N_
COM_
MAX4754/MAX4754A
MAX4755/MAX4756/
MAX4756A
Figure 2. Break-Before-Make Interval
V
GEN
GND
COM_
C
L
V
OUT
V+
V
OUT
IN
OFF
ON
OFF
ΔV
OUT
Q = (ΔV
OUT
)(C
L
)
NC_
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
OFF
ON
OFF
IN
V
IL
TO V
IH
V+
R
GEN
IN_
OR NO_
MAX4754/MAX4754A
MAX4755/MAX4756/
MAX4756A
Figure 3. Charge Injection
MAX4754/MAX4754A/MAX4755/MAX4756/MAX4756A
0.5
Ω
, Quad SPDT Switches in UCSP/QFN
______________________________________________________________________________________ 11
Timing Circuits/Timing Diagrams (continued)
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND OFF NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND ON NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
+5V
V
OUT
V+
IN_
NC1
COM1
NO1*
V
IN
OFF-ISOLATION = 20log
V
OUT
V
IN
ON-LOSS = 20log
V
OUT
V
IN
CROSSTALK = 20log
V
OUT
V
IN
NETWORK
ANALYZER
50Ω
50Ω 50Ω
50Ω
MEAS REF
10nF
0V OR V+
50Ω
GND
*FOR CROSSTALK, THIS PIN IS NO2.
NC2 AND COM2 ARE OPEN.
MAX4754/MAX4754A
MAX4755/MAX4756/
MAX4756A
Figure 4. On-Loss, Off-Isolation, and Crosstalk
CAPACITANCE
METER
NC_ or
NO_
COM_
GND
IN
V
IL
OR V
IH
10nF
V+
f = 1MHz
V+
MAX4754/MAX4754A/
MAX4755/MAX4756/
MAX4756A
Figure 5. Channel On-/Off-Capacitance
MAX4754/MAX4754A/MAX4755/MAX4756/MAX4756A
0.5
Ω
, Quad SPDT Switches in UCSP/QFN
12 ______________________________________________________________________________________
Pin Configurations/Truth Tables
16
15
14
13
NC3
COM3
GND
NO3
9
101112
NO2
COM2
NC2
4321
NC1
COM1
INA
NO1
5
6
7
8
NO4
V+
COM4
NC4
MAX4754/MAX4754A/MAX4755/
MAX4756/MAX4756A
INB (EN)
NC2
NO3
COM3
NC3
COM2
GND
INA
NO1
NO2
INB
(EN)
V+
COM1
NC4
COM4
NO4
NC1
A
B
C
D
1234
UCSP
TOP VIEW
(BUMP SIDE DOWN)
( ) FOR MAX4756/MAX4756A.
*EP: EXPOSED PADDLE CONNECTED TO GND.
INA NO1/NO2 NC1/NC2 NO3/NO4 NC3/NC4
LOW OFF ON — —
HIGH ON OFF — —
INB
LOW — — OFF ON
HIGH — — ON OFF
EN INA NO_ NC_
LOW LOW OFF ON
LOW HIGH ON OFF
HIGH X OFF OFF
HIGH X OFF OFF
TQFN
MAX4754/MAX4754A/MAX4755
MAX4756/MAX4756A
MAX4754
MAX4754A
MAX4755
MAX4756
MAX4756A
+
+
EP*
Chip Information
PROCESS: CMOS
P1-P3P4-P6P7-P9P10-P12P13-P15

MAX4754ETE+T

Mfr. #:
Buy MAX4754ETE+T
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs 0.5Ohm Quad SPST Analog Switch
Lifecycle:
New from this manufacturer.
Delivery:
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