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74HC74N,652
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
74HC_HCT74
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2012. All rights reserv
ed.
Product data sheet
Rev
. 4 — 27 August 2012
10 of 21
NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set
and reset; positive edge-t
rigger
1
1. W
aveforms
Measurement points are given in
T
able 9
.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 7.
Input to output prop
agation delay
, output transition time, clock inpu
t pulse wid
th and maximum
frequency
W
K
W
VX
W
VX
W
K
W
3+/
W
3+/
W
:
W
3/+
W
3/+
I
PD[
9
0
9
0
9
0
9
0
9
,
9
,
9
2+
9
2+
9
2/
9
2/
*1'
*1'
Q'LQSXW
Q&3
LQSXW
Q4RXWSXW
DDD
Q4RXWSXW
W
7+/
W
7/+
74HC_HCT74
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2012. All rights reserv
ed.
Product data sheet
Rev
. 4 — 27 August 2012
1
1 of 21
NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set
and reset; positive edge-t
rigger
Measurement points are given in
T
able 9
.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 8.
Set an
d reset propogation de
lays, pulse widths and recovery time
mna423
t
rec
t
PHL
t
PHL
t
W
t
PLH
t
PLH
V
M
V
M
V
M
t
W
V
M
V
M
V
I
GND
V
I
GND
nSD input
V
I
GND
nRD input
nCP input
V
OH
V
OL
n
Q output
V
OH
V
OL
nQ
output
T
able 9.
Measur
ement point
s
Ty
p
e
Input
Output
V
M
V
M
74HC74
0.5V
CC
0.5V
CC
74HCT74
1.3 V
1.3 V
74HC_HCT74
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2012. All rights reserv
ed.
Product data sheet
Rev
. 4 — 27 August 2012
12 of 21
NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set
and reset; positive edge-t
rigger
T
est data is given in
T
able 10
.
Definitions test circuit:
R
T
= T
ermination resistance should be equal t
o output impedance Z
o
of the pulse generator
.
C
L
= Load capacitance including jig and probe cap
acitance.
R
L
= Load resistance.
S1 = T
est selection switch.
Fig 9.
T
est
circuit for measuring
switching times
001aah768
t
W
t
W
t
r
t
r
t
f
V
M
V
I
negative
pulse
GND
V
I
positive
pulse
GND
10 %
90 %
90 %
10 %
V
M
V
M
V
M
t
f
V
CC
DUT
R
T
V
I
V
O
C
L
G
T
able 10
.
T
est data
Ty
p
e
Input
Load
T
est
V
I
t
r
, t
f
C
L
R
L
74HC74
V
CC
6n
s
1
5p
F
,
5
0
p
F
1k
t
PLH
, t
PHL
7
4
H
C
T
7
4
3V
6n
s
1
5p
F
,
5
0
p
F
1k
t
PLH
, t
PHL
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
74HC74N,652
Mfr. #:
Buy 74HC74N,652
Manufacturer:
NXP Semiconductors
Description:
Flip Flops DUAL D F/F EDGE TRIG
Lifecycle:
New from this manufacturer.
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