74HC_HCT74 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 27 August 2012 10 of 21
NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set and reset; positive edge-trigger
11. Waveforms
Measurement points are given in Table 9.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 7. Input to output propagation delay, output transition time, clock input pulse width and maximum
frequency
W
K
W
VX
W
VX
W
K
W
3+/
W
3+/
W
:
W
3/+
W
3/+
I
PD[
9
0
9
0
9
0
9
0
9
,
9
,
9
2+
9
2+
9
2/
9
2/
*1'
*1'
Q'LQSXW
Q&3
LQSXW
Q4RXWSXW
DDD
Q4RXWSXW
W
7+/
W
7/+




74HC_HCT74 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 27 August 2012 11 of 21
NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set and reset; positive edge-trigger
Measurement points are given in Table 9.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 8. Set and reset propogation delays, pulse widths and recovery time
mna423
t
rec
t
PHL
t
PHL
t
W
t
PLH
t
PLH
V
M
V
M
V
M
t
W
V
M
V
M
V
I
GND
V
I
GND
nSD input
V
I
GND
nRD input
nCP input
V
OH
V
OL
nQ output
V
OH
V
OL
nQ
output
Table 9. Measurement points
Type Input Output
V
M
V
M
74HC74 0.5V
CC
0.5V
CC
74HCT74 1.3 V 1.3 V
74HC_HCT74 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 27 August 2012 12 of 21
NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set and reset; positive edge-trigger
Test data is given in Table 10.
Definitions test circuit:
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
C
L
= Load capacitance including jig and probe capacitance.
R
L
= Load resistance.
S1 = Test selection switch.
Fig 9. Test circuit for measuring switching times
001aah768
t
W
t
W
t
r
t
r
t
f
V
M
V
I
negative
pulse
GND
V
I
positive
pulse
GND
10 %
90 %
90 %
10 %
V
M
V
M
V
M
t
f
V
CC
DUT
R
T
V
I
V
O
C
L
G
Table 10. Test data
Type Input Load Test
V
I
t
r
, t
f
C
L
R
L
74HC74 V
CC
6ns 15pF, 50 pF 1k t
PLH
, t
PHL
74HCT74 3V 6ns 15pF, 50 pF 1k t
PLH
, t
PHL

74HC74N,652

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Flip Flops DUAL D F/F EDGE TRIG
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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