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MAX3291CSD

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
MAX3291/MAX3292
RS-485/RS-422 Transceivers with Preemphasis
for High-Speed, Long-Distance Communication
_______________________________________________________________________________________ 7
Pin Description
Preemphasis Enable Input. To enable preemphasis, leave PEE unconnected, connect to
V
CC
, or drive high. To enable strong-level-drive only mode, connect PEE to GND or drive
low.
PEE1 —
Preemphasis Set Input. Sets the preemphasis interval. Connect a resistor (R
PSET
) in paral-
lel with a capacitor (C
PSET
) from PSET to V
CC
to set the preemphasis interval. See
Typical
Operating Circuit
.
PSET— 1
Receiver Output Enable. Drive RE low to enable RO; RO is high impedance when RE is
high. Drive RE high and DE low to enter low-power shutdown mode.
RE
3 3
Receiver Output. When RE is low and if A - B ≥ 200mV, RO is high; if A - B ≤ -200mV, RO
is low.
RO2 2
Driver Input. With DE high, a low on DI forces the noninverting output low and the inverting
output high. Similarly, a high on DI forces the noninverting output high and the inverting
output low.
DI5 5
GroundGND7 6, 7
No Connection. Not internally connected.N.C.6, 8, 13 8
Driver Output Enable. Drive DE high to enable the driver outputs. These outputs are high
impedance when DE is low. Drive RE high and DE low to enter low-power shutdown mode.
DE4 4
Noninverting Driver OutputY9 9
Inverting Receiver InputB11 11
Connect to V
CC
V
CCD
— 13
Noninverting Receiver InputA12 12
Inverting Driver OutputZ10 10
PIN
MAX3291
FUNCTIONNAME
MAX3292
R
R
Y
Z
V
OD
V
ODP
V
OC
Figure 1. Driver DC Test Load
OUTPUT
UNDER TEST
R
L
S1
S2
V
CC
C
L
Figure 2. Driver or Receiver Enable/Disable Timing Test Load
Positive Supply: +4.75V ≤ V
CC
≤ +5.25VV
CC
14 14
MAX3291/MAX3292
RS-485/RS-422 Transceivers with Preemphasis
for High-Speed, Long-Distance Communication
8 _______________________________________________________________________________________
DI
DE
D
5V
Y
Z
C
L1
C
L2
R
DIFF
V
ODP
RE
RO
DE = LOW
t > t
SHDN
t < t
SHDN
t
RZH(SHDN)
Figure 3. Driver Timing Test Circuit Figure 4. Shutdown Timing Diagram
DI
5V
0
Z
N
Y
P
Z
P
Y
N
Z
N
Z
P
Y
P
Y
N
0 DIFFERENTIAL
0 DIFFERENTIAL
1.5V
t
DPLH
20%
80%
80%
t
DPHL
1.5V
20%
t
HL
t
LH
V
DIFF
= V
Y
- V
Z
V
DIFF
t
SKEW = |
t
PLH
- t
PHL
|
|
Y
N
- Z
N
|
=
V
OD
|
Y
P
- Z
P
|
=
V
ODP
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
5V
0
Y, Z
Y, Z
0
1.5V
1.5V
V
PH
V
PL
V
OL
* + 0.5V
V
OH
* - 0.5V
2.3V
*NOTE: V
OH
AND V
OL
ARE THE OUTPUT LEVELS IN FIGURE 2 WITH
S2 AND S1 CLOSED, RESPECTIVELY.
2.3V
t
DZL(SHDN)
, t
DZL
t
DLZ
t
DZH(SHDN)
, t
DZH
t
DHZ
DE
Figure 5. Driver Propagation Delays Figure 6. Driver Enable and Disable Times
RO
V
OH
V
OL
A
+1V
B
-1V
0 DIFFERENTIAL
1.5V
t
RPHL
t
RPLH
1.5V
t
RSKEW = |
t
RPLH
- t
RPHL
|
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
3V
0
V
CC
RO
RO
0
1.5V 1.5V
V
OL
+ 0.5V
V
OH
- 0.5V
1.5V
1.5V
t
RZL(SHDN)
, t
RZL
t
RLZ
t
RZH(SHDN)
, t
RZH
t
RHZ
RE
Figure 7. Receiver Propagation Delays Figure 8. Receiver Enable and Disable Times
INPUTS
MAX3291/MAX3292
RS-485/RS-422 Transceivers with Preemphasis
for High-Speed, Long-Distance Communication
_______________________________________________________________________________________ 9
R
B
RO
C
L
ATE
A
V
ID
R
Z
N
Y
P
Z
P
Y
N
Z
N
Z
P
Y
P
Y
N
0 DIFFERENTIAL
t
PRE
t
PTND
80%
20%
50%
Figure 9. Receiver Propagation Delay Test Circuit Figure 10. Preemphasis Timing
RE
DI
DE
1k
V
CC
RO
MAX3291
MAX3292
Figure 11. Time-to-Shutdown Test Circuit
Function Tables
DI
RE
DE
1X 1
INPUTS
Z
0
OUTPUTS
Y
1
TRANSMITTING
1 00X 1
High-Z High-Z
High-Z and
SHUTDOWN
X1 0
X0 0
A-B
RE
DE
OUTPUT
RO
1
0≤ -0.2V0 X
1
High-Z and
SHUTDOWN
X1 0
Open0 X
≥ 0.2V0 X
X = Don’t care
Z = High impedance
SHUTDOWN = Low-power shutdown; driver and receiver outputs are high impedance.
INPUTS
RECEIVING
High-ZX1 1
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

MAX3291CSD

Mfr. #:
Buy MAX3291CSD
Manufacturer:
Maxim Integrated
Description:
RS-422/RS-485 Interface IC RS-485/RS-422 Transceivers with Preemphasis for High-Speed, Long-Distance Communication
Lifecycle:
New from this manufacturer.
Delivery:
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